Garp: a MIPS processor with a reconfigurable coprocessor
Citations
2,262 citations
1,666 citations
1,126 citations
895 citations
Cites background from "Garp: a MIPS processor with a recon..."
...Hence, many researchers have proposed other models of reconfigurable systems targeting different applications....
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661 citations
Cites background or methods from "Garp: a MIPS processor with a recon..."
...Garp tools [16] use a SUIF-based C compiler [43] to generate code for the MIPS host with embedded RA configuration code to accelerate (only non-nested) loops....
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...The Garp Architecture [16] resembles an FPGA and comes with a MIPS-II-like host and, for acceleration of specific loops or subroutines, a 32 by 24 RA of LUT-based 2 bit PEs....
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...The Garp Architecture [16] resembles an FPGA andcomes with a MIPS-II-like host and, for acceleration ofspecific loops or subroutines, a 32 by 24 RA of LUT-based 2bit PEs....
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...Garp 1997 [16] 2-D mesh 2 bit global & semi-global lines heuristic routing loop acceleration...
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References
3,432 citations
"Garp: a MIPS processor with a recon..." refers methods in this paper
...Data Encryption Standard DES One of the most important encryption methods over the last 20 years has been the Data Encryption Standard, or DES [12]....
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...One of the most important encryption methods over the last 20 years has been the Data Encryption Standard, or DES [12]....
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...Each 64 bits is run through an “obfuscation loop” 16 times; and it is in this loop that DES spends most of its time....
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...Software implementations of DES invariably implement the S-boxes as table lookups requiring a read from memory for each S-box evaluation....
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...DES is a good application for reconfigurablehardware because normal processors have trouble implementing it efficiently....
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1,077 citations
"Garp: a MIPS processor with a recon..." refers methods in this paper
...To dither to this palette we employed Floyd-Steinberg error diffusion [13], which is essentially the standard algorithm for this task....
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475 citations
"Garp: a MIPS processor with a recon..." refers background in this paper
...To address some of these concerns, various researchers have proposed building a machine that tightly couples reconfigurable hardware with a conventional microprocessor [2, 8, 9]....
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435 citations
"Garp: a MIPS processor with a recon..." refers background in this paper
...In recent years, reconfigurable hardware—usually in the guise of field-programmable gate arrays (FPGAs)—has been touted as a new and better means of performing computation [1, 2, 3]....
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415 citations
"Garp: a MIPS processor with a recon..." refers background in this paper
...In recent years, reconfigurable hardware—usually in the guise of field-programmable gate arrays (FPGAs)—has been touted as a new and better means of performing computation [1, 2, 3]....
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