Gate recess structure engineering using silicon-nitride-assisted process for increased breakdown voltage in pseudomorphic HEMTs
TL;DR: In this paper, the authors reported the fabrication of pseudomorphic high electron mobility transistors (pHEMTs) with engineered recess structure of any width of choice, by a single lithography and etching step with the help of silicon-nitride-assisted process.
Abstract: We report the fabrication of pseudomorphic high electron mobility transistors (pHEMTs) with engineered recess structure of any width of choice, by a single lithography and etching step with the help of silicon-nitride-assisted process. In this process, a silicon nitride layer is deposited prior to gate lithography. First, the silicon nitride is etched by buffered hydrofluoric acid (BHF) in the gate opening and then selective recessing is performed. The recess base width can be engineered by varying etch time of silicon nitride in BHF. The base width increases linearly with etch time as shown by SEM. We demonstrate that the top photoresist gate opening that decides the gate length is unaffected by any duration of silicon nitride etch time. Thereby, we have engineered the distance from gate edge to n+-GaAs (Lgn+) which decides the gate-to-drain breakdown voltage (BVgd). With this method, BVgd?increased from 12 to 20?V as a function of Lgn+. The electric field distribution across the recess structure has been simulated to interpret this result. Since the high BVgd?of pHEMT is essential for power applications as well as switch applications, this method can be easily adopted even though the corresponding reduction in transconductance and unit current gain cut-off frequency (ft) is only marginal from 375 to 350 mS mm?1?and from 39 to 31?GHz, respectively.
Citations
More filters
TL;DR: In this paper, electron microscopy techniques employing nanometer and sub-nanometer scale imaging capability of structure and chemistry have been widely used to characterise various aspects of electronic and optoelectronic device structures such as InAs and GaN nanowires.
Abstract: Microstructural and compositional characterisation of electronic materials in support of the development of GaAs, GaN and GaSb based multilayer device structures is described. Electron microscopy techniques employing nanometer and sub-nanometer scale imaging capability of structure and chemistry have been widely used to characterise various aspects of electronic and optoelectronic device structures such as InGaAs quantum dots, InGaAs pseudomorphic (pHEMT) and metamorphic (mHEMT) layers and the ohmic metallisation of GaAs and GaN high electron mobility transistors, nichrome thin film resistors, GaN heteroepitaxy on sapphire and silicon substrates, as well as InAs and GaN nanowires. They also established convergent beam electron diffraction techniques for determination of lattice distortions in III-V compound semiconductors, EBSD for crystalline misorientation studies of GaN epilayers and high-angle annular dark field techniques coupled with digital image analysis for the mapping of composition and strain in the nanometric layered structures. Also, in-situ SEM experiments were performed on ohmic metallisation of pHEMT device structures. The established electron microscopy expertise for electronic materials with demonstrated examples is presented.
2 citations
TL;DR: In this paper, a single mask processing technique for realizing double recess structure with the help of silicon nitride layer was presented, where two etching steps of silicon oxide and GaAs followed one after the other, generated the double recess structures, wherein the various etch times decide the width and shape of double recess.
References
More filters
Abstract: The voltage breakdown behavior of a number of different MESFET structures has been investigated using a two-dimensional numerical model. The site of the avalanche is found to be under the drain edge of the gate in recessed devices under all bias conditions, but moves towards the drain contact in planar structures when the channel is not pinched off. The dependence of the breakdown voltage on a variety of geometrical and physical variables has been studied. In particular the surface is shown to play an important part in determining the breakdown voltage.
48 citations
TL;DR: In this paper, a double-recessed 0.2-mu m-gate-length pseudomorphic HEMT (PHEMT) has been demonstrated with 500 mW of output power (833 mW/mm of gate periphery), 6-dB gain, and 35% power-added efficiency (PAE) at 32 GHz.
Abstract: A double-recessed 0.2- mu m-gate-length pseudomorphic HEMT (PHEMT) has been demonstrated with 500 mW of output power (833 mW/mm of gate periphery), 6-dB gain, and 35% power-added efficiency (PAE) at 32 GHz. At 44 GHz, the device exhibited 494 mW of output power (823 mW/mm), 4.3-dB gain, and 30% PAE. This level of performance is attributed to excellent MBE material, optimized epitaxial layer design, and the use of individual source vias and of double recess with tight channel dimensions. Excellent 3-in-wafer uniformity was also observed: DC yield was greater than 95% and the interquartile range for all DC parameters was less than 20% of the median value (most are significantly lower). >
34 citations
TL;DR: In this paper, a monolithic W-band two-stage balanced power amplifier has been developed using 0.1/spl mu/m AlGaAs-InGaas-GaAs pseudomorphic T-gate power HEMT technology, which achieved an output power of 102 mW and a small signal gain of 9 dB with input/output return losses of better than 10 dB at 94 GHz.
Abstract: A monolithic W-band two-stage balanced power amplifier has been developed using 0.1-/spl mu/m AlGaAs-InGaAs-GaAs pseudomorphic T-gate power HEMT technology. This monolithic power amplifier has demonstrated an output power of 102 mW and a small signal gain of 9 dB with input/output return losses of better than 10 dB at 94 GHz. Moreover, this monolithic chip is fabricated using production GaAs-based HEMT MMIC technology and a good yield is obtained. The circuit design relies on extensive EM analysis of matching structures and accurate device modeling. The success of this monolithic circuit development indicates the maturity of power HEMT MMIC technology at W-band. >
33 citations
26 Jun 1996
TL;DR: In this paper, the authors demonstrate that the electrostatic interaction of the source seriously degrades the device's gate-drain breakdown, and must be taken into consideration in device design.
Abstract: Summary form only given. Conventional wisdom suggests that in pseudomorphic high electron mobility transistors (pHEMTs), the field between the drain and the gate determines off-state breakdown, and that the drain to gate voltage therefore sets the breakdown voltage of the device. Thus, the two terminal breakdown voltage is a widely used figure of merit, and most models for breakdown focus on the depletion region in the gate-drain gap, while altogether ignoring the source. We present new measurements and simulations that demonstrate that for power pHEMTs, the electrostatic interaction of the source seriously degrades the device's gate-drain breakdown, and must be taken into consideration in device design. As a vehicle for this study we have used a state-of-the-art L/sub G/=0.25 /spl mu/m double heterostructure pHEMT with excellent power performance (P/sub 0/= 1W, Gain= 11 dB, and PAE=60% at 10 GHz for W/sub G/=1200 /spl mu/m) and high breakdown voltage (BV/sub DG/=21 V at I/sub D/=1 mA/mm).
27 citations
TL;DR: In this paper, the reverse gate currents of a GaAs MESFET, an AlGaAs/InGaAs pseudomorphic HEMT, and two types of AlInAs/inGaAs HEMTs were measured at −30, 0, 30, 60, 90, and 120°C.
Abstract: The reverse gate currents and their temperature dependence show strong dependence on materials, sizes, impurity densities, and device structures. We investigated whether a combination of field emission and tunnel currents can explain the reverse currents, in such unified manner that the theory agrees well with experiments, without adjusting for each sample regardless of the difference in the design parameters of the devices. The reverse gate currents of a GaAs MESFET, an AlGaAs/InGaAs pseudomorphic HEMT, and two types of AlInAs/InGaAs HEMTs were measured at −30, 0, 30, 60, 90, and 120°C, and compared with the calculation. The theory showed fair coincidence with the all experiments in-spite of quite different structures and characteristics of the samples. It is suggested that the reverse gate current is determined by the barrier height and the electric field, regardless of whether a devices is HEMT or FET.
21 citations