Gate recess structure engineering using silicon-nitride-assisted process for increased breakdown voltage in pseudomorphic HEMTs
TL;DR: In this paper, the authors reported the fabrication of pseudomorphic high electron mobility transistors (pHEMTs) with engineered recess structure of any width of choice, by a single lithography and etching step with the help of silicon-nitride-assisted process.
Abstract: We report the fabrication of pseudomorphic high electron mobility transistors (pHEMTs) with engineered recess structure of any width of choice, by a single lithography and etching step with the help of silicon-nitride-assisted process. In this process, a silicon nitride layer is deposited prior to gate lithography. First, the silicon nitride is etched by buffered hydrofluoric acid (BHF) in the gate opening and then selective recessing is performed. The recess base width can be engineered by varying etch time of silicon nitride in BHF. The base width increases linearly with etch time as shown by SEM. We demonstrate that the top photoresist gate opening that decides the gate length is unaffected by any duration of silicon nitride etch time. Thereby, we have engineered the distance from gate edge to n+-GaAs (Lgn+) which decides the gate-to-drain breakdown voltage (BVgd). With this method, BVgd?increased from 12 to 20?V as a function of Lgn+. The electric field distribution across the recess structure has been simulated to interpret this result. Since the high BVgd?of pHEMT is essential for power applications as well as switch applications, this method can be easily adopted even though the corresponding reduction in transconductance and unit current gain cut-off frequency (ft) is only marginal from 375 to 350 mS mm?1?and from 39 to 31?GHz, respectively.
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TL;DR: In this paper, electron microscopy techniques employing nanometer and sub-nanometer scale imaging capability of structure and chemistry have been widely used to characterise various aspects of electronic and optoelectronic device structures such as InAs and GaN nanowires.
Abstract: Microstructural and compositional characterisation of electronic materials in support of the development of GaAs, GaN and GaSb based multilayer device structures is described. Electron microscopy techniques employing nanometer and sub-nanometer scale imaging capability of structure and chemistry have been widely used to characterise various aspects of electronic and optoelectronic device structures such as InGaAs quantum dots, InGaAs pseudomorphic (pHEMT) and metamorphic (mHEMT) layers and the ohmic metallisation of GaAs and GaN high electron mobility transistors, nichrome thin film resistors, GaN heteroepitaxy on sapphire and silicon substrates, as well as InAs and GaN nanowires. They also established convergent beam electron diffraction techniques for determination of lattice distortions in III-V compound semiconductors, EBSD for crystalline misorientation studies of GaN epilayers and high-angle annular dark field techniques coupled with digital image analysis for the mapping of composition and strain in the nanometric layered structures. Also, in-situ SEM experiments were performed on ohmic metallisation of pHEMT device structures. The established electron microscopy expertise for electronic materials with demonstrated examples is presented.
2 citations
TL;DR: In this paper, a single mask processing technique for realizing double recess structure with the help of silicon nitride layer was presented, where two etching steps of silicon oxide and GaAs followed one after the other, generated the double recess structures, wherein the various etch times decide the width and shape of double recess.
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TL;DR: In this article, pseudomorphic high-electron mobility transistors (PHEMTs) with various field-plate (FP) and gate-recess (GR) extensions were fabricated.
Abstract: GaAs pseudomorphic high-electron mobility transistors (PHEMTs) with various field-plate (FP) and gate-recess (GR) extensions were fabricated. Their on-state resistance (R on), breakdown voltage, flicker noise, and microwave characteristics were investigated. The FP length and GR width extensions can be controlled to improve significantly the breakdown voltage of PHEMTs. The design-of-experiment approach was employed with 16 transistors. The FP length extension was found to improve efficiently the off-state breakdown voltage (BV off) because of its suppression of the thermionic-field emission of gate electrons. However, an FP-induced depletion region cannot easily suppress channel impact ionization, which dominates the on-state breakdown voltage (BV on). Additionally, the FP length extension reduces the flicker noise of a device that is caused by surface states. The GR width extension has an opposite effect, because the exposed area of the uncap Schottky layer exposure increases with the GR width.
7 citations
TL;DR: In this paper, a two-dimensional hydrodynamic modeling of the avalanche breakdown in PHEMTs is presented, and the authors show that the highest breakdown voltage is obtained for a double step gate recess with two delta-doping layer plans.
Abstract: The aim of this study is the physical understanding of the avalanche breakdown phenomenon in PHEMTs (AlGaAs/GaInAs/GaAs), in order to optimise the structure and to improve the breakdown voltage. It is therefore necessary to study the influence of the physical parameters on which this phenomenon depends, such as the layer structure, the doping concentration or the gate recess topology. The study is based on a two-dimensional hydrodynamic modelling, that takes electrons and holes into account, and shows that the highest breakdown voltage is obtained for a double step gate recess with two delta-doping layer plans.
4 citations
01 Sep 1992
TL;DR: In this article, a PECVD-assisted process was used to fabricate 0.1-μm gate-length planar-doped AlGaAs/InGaA/GaAs pseudomorphic High Electron Mobility Transistors (HEMT's).
Abstract: A Plasma Enhanced Chemical Vapour Deposited (PECVD) silicon nitride assisted process has been successfully used to fabricate 0.1-μm gate-length planar-doped AlGaAs/InGaAs/GaAs pseudomorphic High Electron Mobility Transistors (HEMT's). Excellent d.c. and microwave performances are achieved by these devices, demonstrating the suitability of the process for fabricating ultrashort gate length devices. Moreover, it is shown that the process offers the possibility of decreasing the resistance of ultrashort gate fingers by forming mechanically stable T-gates.
2 citations
TL;DR: In this paper, two molecular beam epitaxy (MBE) based, single and double selective gate recess structures have been developed to provide superior and high-yield power pseudomorphic high electron mobility transistor (PHEMT) device and monolithic microwave integrated circuit (MMIC) performance at microwave and millimeter wave frequencies.
1 citations