Genetic design of VLSI-layouts
12 Sep 1995-pp 430-435
TL;DR: A genetic algorithm for the physical design of VLSI-chips simultaneously optimizes the placement of the cells with the total routing and the detailed routing while the global routes are optimized by the genetic algorithm.
Abstract: A genetic algorithm for the physical design of VLSI-chips is presented. The algorithm simultaneously optimizes the placement of the cells with the total routing. During the placement the detailed routing is done, while the global routes are optimized by the genetic algorithm. This is just opposed to the usual serial approach, where the computation of the detailed routing is the last step in the layout-design.
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TL;DR: In this article, the authors introduce genetic algorithms (GA) as a complete entity, in which knowledge of this emerging technology can be integrated together to form the framework of a design tool for industrial engineers.
Abstract: This paper introduces genetic algorithms (GA) as a complete entity, in which knowledge of this emerging technology can be integrated together to form the framework of a design tool for industrial engineers. An attempt has also been made to explain "why" and "when" GA should be used as an optimization tool.
893 citations
01 Feb 2007
TL;DR: A memetic algorithm (MA) for a nonslicing and hard-module VLSI floorplanning problem is presented that uses an effective genetic search method to explore the search space and an efficient local search methods to exploit information in the search region.
Abstract: Floorplanning is an important problem in very large scale integrated-circuit (VLSI) design automation as it determines the performance, size, yield, and reliability of VLSI chips. From the computational point of view, VLSI floorplanning is an NP-hard problem. In this paper, a memetic algorithm (MA) for a nonslicing and hard-module VLSI floorplanning problem is presented. This MA is a hybrid genetic algorithm that uses an effective genetic search method to explore the search space and an efficient local search method to exploit information in the search region. The exploration and exploitation are balanced by a novel bias search strategy. The MA has been implemented and tested on popular benchmark problems. Experimental results show that the MA can quickly produce optimal or nearly optimal solutions for all the tested benchmark problems
159 citations
Dissertation•
07 Jan 2007
TL;DR: The thesis describes how the performance of the generic evolutionary design of solid objects is improved by using an explicit mapping stage between genotypes and phenotypes, steady-state reproduction with preferential selection, and a new lifespan limiter.
Abstract: This thesis investigates the novel idea of using a computer to create and optimise conceptual designs of a range of differently-shaped three-dimensional solid objects from scratch. An extensive literature review evaluates all related areas of research and reveals that no such system exists. The development of a generic evolutionary design system, using a genetic algorithm (GA) as its core, is then presented. The thesis describes a number of significant advances necessitated by the development of this system. Firstly, a new low-parameter spatial-partitioning representation of solid objects is introduced, which allows a wide range of solid objects to be appropriately defined and easily manipulated by a GA. Secondly, multiobjective optimisation is investigated to allow users to define design problems without fine-tuning large numbers of weights. As a result of this, the new concepts of acceptability, range-independence and importance are introduced and a new multiobjective ranking method is identified as being most appropriate. Thirdly, variable-length chromosomes in GAs are addressed, to allow the number of primitive shapes that define a design to be variable. This problem is overcome by the use of a new hierarchical crossover operator, which uses the new concept of a semantic hierarchy to reference chromosomes. Additionally, the thesis describes how the performance of the GA is improved by using an explicit mapping stage between genotypes and phenotypes, steady-state reproduction with preferential selection, and a new lifespan limiter. A library of modular evaluation software is also presented, which allows a user to define new design problems quickly and easily by picking combinations of modules to guide the evolution of designs. Finally, the feasibility of the generic evolutionary design of solid objects is demonstrated by presenting the successful evolution of both conventional and unconventional designs for fifteen different solid-object design tasks, e.g. tables, heatsinks, penta-prisms, boat hulls, aerodynamic cars.
82 citations
TL;DR: A genetic algorithm that uses a slicing tree construction process for the placement and area optimization of soft modules in very large scale integration floorplan design is presented and it is demonstrated that this GA outperforms a simulated annealing implementation with the same representation and mutation operators as the GA.
Abstract: We present a genetic algorithm (GA) that uses a slicing tree construction process for the placement and area optimization of soft modules in very large scale integration floorplan design. We have overcome the serious representational problems usually associated with encoding slicing floorplans into GAs and have obtained excellent (often optimal) results for module sets with up to 100 rectangles. The slicing tree construction process used by our GA to generate the floorplans has a runtime scaling of O(n lg n). This compares very favorably with other recent approaches based on nonslicing floorplans that require much longer runtimes. We demonstrate that our GA outperforms a simulated annealing implementation with the same representation and mutation operators as the GA.
81 citations
Cites methods from "Genetic design of VLSI-layouts"
...Schnecke and Vornberger [13], for example, used a GA to manipulate the slicing tree directly for VLSI floorplanning problems....
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References
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Book•
07 Sep 1990TL;DR: This paper will concern you to try reading combinatorial algorithms for integrated circuit layout as one of the reading material to finish quickly.
Abstract: Feel lonely? What about reading books? Book is one of the greatest friends to accompany while in your lonely time. When you have no friends and activities somewhere and sometimes, reading book can be a great choice. This is not only for spending the time, it will increase the knowledge. Of course the b=benefits to take will relate to what kind of book that you are reading. And now, we will concern you to try reading combinatorial algorithms for integrated circuit layout as one of the reading material to finish quickly.
1,069 citations
"Genetic design of VLSI-layouts" refers methods in this paper
...Figure 4: The detailed routing inside a channel The global routing can be solved by graph based techniques, Integer Programming or hierarchical approaches [5]....
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Proceedings Article•
01 Jan 1984
TL;DR: TimberWolf as discussed by the authors is an integrated set of placement and routing optimization programs for standard cell, macro/custom cell, and gate-array placement, as well as standard cell global routing.
Abstract: TimberWolf is an integrated set of placement and routing optimization programs. The general combinatorial optimization technique known as simulated annealing is used by each program. Programs for standard cell, macro/custom cell, and gate-array placement, as well as standard cell global routing, have been developed. Experimental results on industrial circuits show that area savings over existing layout programs ranging from 15 to 62% are possible.
495 citations
Book•
31 Mar 1988
TL;DR: In this paper, the authors present a method of simulated annealing for gate-array placement and multiple-folding of a gate-and-column-based cell placement.
Abstract: 1. Introduction.- 1.1. Combinatorial Optimization.- 1.2. The Method of Simulated Annealing.- 1.3. Remarks.- 2. Placement.- 2.1. Introduction.- 2.2. Gate-Array Placement.- 2.2.1. The K-G-V Algorithm.- 2.2.2. TimberWolf.- 2.3. Standard-Cell Placement.- 2.3.1. TimberWolf.- 2.3.2. Another Approach.- 2.4. Macro/Custom-Cell Placement.- 2.4.1. Jespen and Gelatt's Algorithm.- 2.4.2. TimberWolf.- 2.5. Other Stochastic Algorithms.- 2.5.1. Genetic Placement.- 2.5.2. Simulated Evolution Placement.- 2.6. Concluding Remarks.- 3. Floorplan Design.- 3.1. Introduction.- 3.2. Part 1: Rectangular Modules.- 3.2.1. Slicing Floorplans.- 3.2.2. Solution Space.- 3.2.3. Neighboring Solutions.- 3.2.4. Cost Function.- 3.2.5. Annealing Schedule.- 3.2.6. Experimental Results.- 3.3. Part 2: Rectangular and L-Shaped Modules.- 3.3.1. Geometric Figures.- 3.3.2. The Operators.- 3.3.3. Floorplan Representation.- 3.3.4. The Algorithm.- 3.3.5. Experimental Results.- 3.4. Concluding Remarks.- 4. Channel Routing.- 4.1. Introduction.- 4.2. The Channel Routing Problem.- 4.3. The Channel Router SACR.- 4.3.1. Solution Space.- 4.3.2. Neighboring Solutions.- 4.3.3. Cost Function.- 4.3.4. Annealing Schedule.- 4.3.5. Fast Approximation Scheme.- 4.4. The Channel Router SACR2.- 4.5. Experimental Results and Discussion.- 4.6. Concluding Remarks.- 5. Permutation Channel Routing.- 5.1. Introduction.- 5.2. Motivation and Applications.- 5.3. NP-Completeness Results.- 5.4. First Method - Simulated Annealing.- 5.4.1. Neighboring Solutions.- 5.4.2. Cost Function.- 5.4.3. Annealing Schedule.- 5.5. Second Method - Iterative Improvement.- 5.5.1. The Iterative Improvement Scheme.- 5.5.2. Version-D.- 5.5.3. Version-C.- 5.5.4. Choice of Initial Solution.- 5.6. Experimental Results.- 5.7. Concluding Remarks.- 6. PLA Folding.- 6.1. Introduction.- 6.2. The PLA Folding Problem.- 6.3. The PLA Folding Algorithm.- 6.3.1. Solution Space.- 6.3.2. Neighboring Solutions.- 6.3.3. Cost Function.- 6.3.4. Annealing Schedule.- 6.4. Multiple-Folded PLA Realization.- 6.5. Constrained Multiple Folding.- 6.6. Simple Folding.- 6.7. Experimental Results and Discussions.- 6.8. Concluding Remarks.- 7. Gate Matrix Layout.- 7.1. Introduction.- 7.2. Problem Formulation.- 7.3. Generalized Problem Formulation.- 7.4. Advantages of the Generalized Formulation.- 7.5. The Simulated Annealing Method.- 7.5.1. Solution Space.- 7.5.2. Neighboring Solutions.- 7.5.3. Cost Function.- 7.5.4. Annealing Schedule.- 7.6. Experimental Results.- 7.7. Concluding Remarks.- 8. Array Optimization.- 8.1. Introduction.- 8.2. The Array Optimization Problem.- 8.3. Definitions.- 8.4. The Array Optimization Algorithm.- 8.4.1. The Algorithm Column-Fold.- 8.4.2. The Algorithm Row-Fold.- 8.4.3. The Solution Space.- 8.4.4. The Main Folding Algorithm.- 8.5. Experimental Results.- 8.6. Concluding Remarks.- References.
228 citations
IBM1
TL;DR: This paper discusses the problem of selecting an optimal implementation for each building block so that the area of the final layout is minimized, and suggests a branch and bound algorithm which proves to be very efficient and can handle successfully large general non-slicing floorplans.
Abstract: The building blocks in a given floorplan have several possible physical implementations yielding different layouts. A discussion is presented of the problem of selecting an optimal implementation for each building block so that the area of the final layout is minimized. A polynomial algorithm that solves this problem for slicing floorplans was presented elsewhere, and it has been proved that for general (nonslicing) floorplans the problem is NP-complete. The authors suggest a branch-and-bound algorithm which proves to be very efficient and can handle successfully large general nonslicing floorplans. The high efficiency of the algorithm stems from the branching strategy and the bounding function used in the search procedure. The branch-and-bound algorithm is supplemented by a heuristic minimization procedure which further prunes the search, is computationally efficient, and does not prevent achieving a global minimum. Finally, the authors show how the nonslicing and the slicing algorithms can be combined to handle efficiently very large general floorplans. >
78 citations
23 Sep 1994
TL;DR: A novel approach to global routing of macro-cell layouts by a genetic algorithm that generates several short routes for each net while minimizing area and secondarily interconnect length is presented.
Abstract: This paper presents a novel approach to global routing of macro-cell layouts. A genetic algorithm generates several short routes for each net. Another genetic algorithm then selects a route for each net while minimizing area and secondarily interconnect length. Exact channel densities are used for area estimation. The layout quality obtained on MCNC benchmarks compares favourably to that of TimberWolfMC.
32 citations