Abstract: We have developed a novel and effective method for predicting the distribution of MOSFET device characteristics, which also enables us to specify the most typical process conditions for any device characteristics. In our approach, the distribution of the device characteristic caused by the fluctuation of every single process are calculated and then merged. Comparison with the result of the measured data has established that our method is accurate and practical. 1. Background Predicting accurate distributions of device characteristics using TCAD at the device development phase is indispensable for the concurrent designing of cell libraries and circuits with appropriate performance margins. While designing, the saturated drain current of NMOS and PMOS (IdsN and IdsP) pair is used as the reference of the best/worst performance conditions. By measuring the IdsN-IdsP pairs of manufactured chips, it has been found that their distribution assumes an oval shape, as shown in Fig.1. Process conditions which lead to particular device characteristics, the F F and SS points in Fig.1 for example, should be specified for accurate prediction of device characteristics such as Id-Vg, Id-Vd and C-V. Monte Carlo simulations (Kunitomo et al. 1999) and response surface methods (Felt et al. 1996), which are well-known methodologies for predicting the distribution, have a problem in that they cannot specify the typical process conditions which lead to particular device characteristics. We have developed a new methodology for predicting the distribution of device characteristics, which also enables us to specify the most typical process conditions for any device characteristics with only a few calculations. In our approach, to obtain the total distribution and process conditions, arrays which represent the distribution of the device characteristic caused by the fluctuation of every single process are prepared and then merged. 2. Methodology for Predicting the Distribution of Device Characteristics Before applying our method, well-calibrated process and device simulators should be prepared. The method consists of the following four steps: (step 1) Processes which have significant effects on the device characteristic, saturated drain current IdsN and IdsP in this case, are selected by calculating sensitivities of every process fluctuation to thc cha,ra.cteristic. From this result, the distribution of every selected process is mapped onto the distribution of the device characteristic. (step 2) For every process selected, a two dimensional array with IdsN and IdsP for row a,nd column is prepared. Elements of the arrays are tilled with probability of occurrence of the corresponding IdsN-IdsP value pairs calculated from the distribution of the device characteristic. (step 3) Arrays for every significant process specified in step 2 are merged. Elements of the merged array are calculated using the following equation: J'p~,pz(4j) = X7n,TL(ppl (m,n) * pp2(i m , j n,)) where Pp(i, j) is tlie probability of occurrence of the (i, j ) element, with the origin specified at nominal values of IdsN and IdsP, caused by the fluctuation of process p. This operation represents tha.t assuming process p l and p2 are independent, every element of thc array caused by process p2 is distributed following the distribution of another process p l . In the computational irnplementa,tion of this operation, every array element has an attribute list, where the corresponding process name, value and probability of occurrence are described. These lists are then combined and passed t o the resultant array during the operation, which enables us to predict the most typical process conditions for the specified IdsNIdsP value pair. (step 4) To specify an appropriate 30 or any di~tribut~ion area frorn the resultant array, elements with a higher probability of occurrence are selected from the array and added until the sum of the probability reaches the specified rate. When the 3a area is specified, the values of the array elements are added until the silm reaches 99.7%. 3. Application Example We have applied this met,hod to predicting the distribution of the IdsN-IdsP characteristics of a 0.18pm generation lLlOSFET and t,hen evaluated our method by comparing the resultant distribution with the measured data, a.nd data calculated using Montc Carlo simulation. 3.1. Specification of Device Characteristics Distribution We have analyzed the sensitivity of a device characteristic of saturated drain current (Ids5 and IdsP) to every process fluctuation, and three major processes whose fluctuations have significant effect on the characteristic are selected. The nomi~lal values a,nd standard deviation ( 3 0 ) of the processes and their effect on the characteristic are shown in Table 1. Though every process fluctuation is assunled to follow Gaussian distribution, distribution of the characteristic caused by Lg fluctuation does not because of the non-linearity of the drain current vs. gate length relation. We specified two separa,te Gaussian distributions of the characteristic, one for the case gate length is manufact~ired longer than the nominal, and the other for shorter. Gate length mismatch represents the difference between the gate lengths of paired NMOS and PMOS; the distribution of the characteristic caused by the mismatch depends on the gate lengths of the pair because of short channel effects. We specified the distribution of the characteristic caused by gate length mismatch as a function of Lg. 3.2 Calculation Results and Their Accuracy in Re-calculation Calculation results are shown in Fig.:! with In, 2a and 30 distributions indicated. Most typical process conditions that lead to FF, SS, FS and SF points on the 3a line are extracted and shown in Table 2. With these process conditions, device characteristics are calculated again and compared with the original prediction (Fig.3 and Table 3). All differences are less than 2%, which indicates the degree of accuracy of our method for the extraction of process conditions which lead to particular device characteristics. 3.3 Comparison with Measured Data and Monte Carlo Simulation The 3a line derived using our method is shown with the calculated points using Monte Carlo simulation (1,000 points, Fig.4) and the measured points of manufactured chips (11,649 points, Fig.5). Compared with Monte Carlo simulation, 99.3% of calculated points are within our 30 line and its distribution indicates good agreement with our method. As for the measured data, 99.3% of the measured points are within our 3a line and its distribution tends to shift slightly in the direction of less Ids, compared with our method. These comparison results suggest that our method provides sufficient accuracy in the development phase. 4. Conclusion We have developed an efficient method to predict the distribution of device characteristics. Using this method, not only the distribution but also the typical process conditions for any particular device characteristics can be extracted from the result. Comparison with the result of Monte Carlo simulation and with the measured data has established that our method is accurate and practical.