Book ChapterDOI
High-Level Synthesis in a Production Environment: Methodology and Algorithms
Reinaldo A. Bergamaschi
- pp 195-230
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TLDR
This paper presents a meta-modelling framework that automates the very labor-intensive and therefore time-heavy and error-prone process of computer-aided design (CAD) design.Abstract:
Ever since commercial integrated circuits (IC) became available in the early 60s, there has been a need for computer-aided design (CAD) tools. This need is a direct consequence of two problems: firstly, the need to automate repetitive, time consuming and error-prone tasks; and secondly, the explosion in design complexity which has rendered computer tools indispensable for handling vast amounts of data.read more
Citations
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Journal ArticleDOI
Net scheduling in high-level synthesis
TL;DR: A new net scheduling and allocation model generates net schedules that minimize either execution time or resources within a VHDL-based high-level synthesis system called Ahiles.
Book ChapterDOI
High-Level Synthesis through Transforming VHDL Models
TL;DR: High-level synthesis techniques including scheduling, allocation, and binding are modified for the model to reduce the number of control steps, FSM states, state transitions, functional and storage units in an RTL-structure.
Journal ArticleDOI
A Note on Hardware-Software Codesign
TL;DR: A proposal will be made which builds on the similarity of Ada and VHDL and is strongly oriented towards immediate practical applicability, and can be characterized as object-based, software-oriented, manual, hardware-software re-partitioning.
An Automatic Design Flow from Formal Models to FPGA
TL;DR: The contribution of this paper is the integration of the two approaches through the definition of systematic rules to translate SMV programs into VHDL descriptions, providing thus an important component for an automated circuit design environment making efficient use of formal methods.
References
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Book
Compilers: Principles, Techniques, and Tools
TL;DR: This book discusses the design of a Code Generator, the role of the Lexical Analyzer, and other topics related to code generation and optimization.
Journal ArticleDOI
Combinatorial optimization: algorithms and complexity
TL;DR: This clearly written, mathematically rigorous text includes a novel algorithmic exposition of the simplex method and also discusses the Soviet ellipsoid algorithm for linear programming; efficient algorithms for network flow, matching, spanning trees, and matroids; the theory of NP-complete problems; approximation algorithms, local search heuristics for NPcomplete problems, more.
Book
Logic Minimization Algorithms for VLSI Synthesis
TL;DR: The ESPRESSO-IIAPL as discussed by the authors is an extension of the ESPRSO-IIC with the purpose of improving the efficiency of Tautology and reducing the number of blocks and covers.
Journal ArticleDOI
Force-directed scheduling for the behavioral synthesis of ASICs
P.G. Paulin,J.P. Knight +1 more
TL;DR: A general scheduling methodology is presented that can be integrated into specialized or general-purpose high-level synthesis systems and reduces the number of functional units, storage units, and buses required by balancing the concurrency of operations assigned to them.
Journal ArticleDOI
Automated Synthesis of Data Paths in Digital Systems
TL;DR: This paper presents a unifying procedure, called Facet, for the automated synthesis of data paths at the register-transfer level that minimizes the number of storage elements, data operators, and interconnection units.