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Journal ArticleDOI

High Performance CMOS Transconductor for Mixed-Signal Analog-Digital Applications

01 Jun 1999-Analog Integrated Circuits and Signal Processing (Kluwer Academic Publishers)-Vol. 19, Iss: 3, pp 303-317
TL;DR: In this paper, the authors describe a CMOS building block dedicated to high performance mixed analog-digital circuits and systems, which consists of six MOS transistors realizing a new wideband and tunable transconductance.
Abstract: This paper describes a CMOS building block dedicated to high performance mixed analog-digital circuits and systems. The circuit consists of six MOS transistors realizing a new wideband and tunable transconductance. The theory of operation of this device is presented and the effects of transistor nonidealities on the global performances are investigated. Use of the proposed circuit to realize tunable functions (Gm-C filter and current opamp) is illustrated. HSPICE simulations show a wide tuning range of the transconductance value from 40 μS to 950 μS (500 μS) for ±2.5 V (±1.5 V) supply voltages. The transconductance value remains constant up to frequencies beyond 500 MHz. The bandpass filter built with few transconductance blocks and capacitances was simulated with ±2.5 V supply voltage, the center frequency is tunable in the range of 30 MHz to 110 MHz. However, the opamp, which is designed with a transresistance-transconductance architecture, was simulated with ±1.5 V supply voltage. The gain of the opamp can be tuned between 70 dB and 96 dB and high gain-bandwidth product of 145 MHz has been achieved at power consumption of less than 0.5 mW. Experimental results on a fabricated transconductor chip are provided.
Citations
More filters
Proceedings ArticleDOI
28 May 2000
TL;DR: A current tuneable fully differential transconductor cell (GM-C) dedicated for filtering applications is proposed, based on a cross-coupled differential pairs input stage with folded cascode output stage in order to realise a high DC gain integrator.
Abstract: In this paper, a current tuneable fully differential transconductor cell (GM-C) dedicated for filtering applications is proposed. The architecture of this cell is based on a cross-coupled differential pairs input stage with folded cascode output stage in order to realise a high DC gain integrator. The resulting integrator's architecture tolerates fabricated characteristic deviations from an ideal representation and has been selected to give a simple tuneable integrator which allows the full programmability of the designed filter. Also, the realisation of a generic 4-order bandpass filter is presented with the 3.3 volts 0.35 /spl mu/m CMOS technology available through the Canadian Microelectronics Corporation (CMC). Finally, principal deviations from ideal transfer function will also be discussed in order to evaluate possible effects of the frequency response introduced by a non ideal integrator.

15 citations

Proceedings ArticleDOI
01 Jan 2000
TL;DR: In this article, a cross-coupled differential pairs input stage with folded cascode output stage is proposed to realize a high DC-gain integrator, which is preferred to the use of the negative resistance load (NRL) approach, since it is more stable and does not require another NRL circuit tuning.
Abstract: In this paper, a current tuneable fully differential transconductor cell (gm-C) dedicated for filtering applications is proposed The architecture used for this new cell is based on a cross-coupled differential pairs input stage with folded cascode output stage in order to realise a high DC-gain integrator This approach is preferred to the use of the negative resistance load (NRL) approach, since it is more stable and does not require another NRL circuit tuning when the overall transconductance of the cell is modified Realisation techniques for a gm-C high-order continuous-time filter are also discussed which allow full programmability of the centre frequency and the quality factor of the filter Finally, a design example of a 4th-order bandpass filter is presented with 33 V 035 /spl mu/m CMOS technology available through the Canadian Microelectronics Corporation (CMC)

8 citations

Proceedings ArticleDOI
02 Sep 2001
TL;DR: A fourth-order CMOS transconductance-C (Gm-C) bandpass filter with on-chip automatic frequency tuning for wireless receiver filtering applications is proposed, designed and optimized for phase error cancellation.
Abstract: A fourth-order CMOS transconductance-C (Gm-C) bandpass filter with on-chip automatic frequency tuning for wireless receiver filtering applications is proposed. A linearized transconductance (Gm) cell is designed and optimized for phase error cancellation. The center frequency of the filter is locked to an external reference frequency using an Adaptive Gain Phase-Locked Loop (AGPLL). The purpose of the AGPLL technique is to provide a short locking time which is under 50 clock cycles, it decreases the filter time response. The power supply of the proposed design is 2.2 volts and the whole circuit has been implemented in 0.35 um CMOS technology available through the Canadian Microelectronics Corporation (CMC).

6 citations

Journal ArticleDOI
TL;DR: In this paper, a programmable band-pass filter based on an array of fully differential transconductance circuits that controls the filter parameters is proposed, and the signal path does not contain any switch, and fine-tuning of the filter parameter is implemented using programmable capacitors.
Abstract: We propose in this paper a programmable band-pass filter based on an array of fully differential transconductance circuits that controls the filter parameters. The signal path does not contain any switch, and fine-tuning of the filter parameters is implemented using programmable capacitors. A digital building block is implemented in the proposed band-pass filter to tune its central frequency as well as its bandwidth. The filter circuit is based on a biquad topology, which is designed and implemented with CMOS 0.18 μm technology. Experimental results show a programming ability of the center frequency between 5.9 and 58 MHz, and the quality factor can be tuned from 0.36 to 10. These features are obtained for a total power consumption of less than 10.5 mW from a single 1.8 V power supply.

4 citations


Cites methods from "High Performance CMOS Transconducto..."

  • ...This technique has been used also in realizing a programmable current amplifier [ 3 ]....

    [...]

Dissertation
08 Dec 2004
TL;DR: In this paper, a methode d'analyse, specialement utilisee for l'analysis du bruit de phase des oscillateurs, semble a ce jour parmi les plus rigoureuses et les plus efficaces en terme de temps de calcul, for le analysis comportementale de ces filtres, necessite la mise au point d'un algorithme original base sur le formalisme des matrices de conversion.
Abstract: Le travail de recherche presente dans ce memoire s'inscrit dans l'objectif general d'etudier la faisabilite de filtres monolithiques radiofrequences (RF) a capacites commutees pour la radiocommunication mobile, et de pouvoir proceder a l'analyse et a la conception de ces filtres en technologie standard BiCMOS 0,35 μm. L'analyse comportementale de ces filtres a necessite la mise au point d'un algorithme original base sur le formalisme des matrices de conversion, dont le principe general consiste a effectuer une linearisation des elements non-lineaires autour du point de fonctionnement grand signal. Cette methode d'analyse, specialement utilisee pour l'analyse du bruit de phase des oscillateurs, semble a ce jour parmi les plus rigoureuses et les plus efficaces en terme de temps de calcul pour l'analyse de ce type de filtres. Traditionnellement, a basse frequence la commande de ces filtres est realisee a l'aide d'un registre a decalage. Cependant, cette technique n'est pas envisageable en RF. Une solution originale qui consiste a commander le filtre a partir d'un oscillateur en anneau controle en tension et de portes logiques " ou exclusif " a ete proposee. Grâce a cette solution, il a ete montre que l'association d'un tel circuit de commande applique a ce type de filtre presente des avantages importants et par consequent devrait le rendre beaucoup plus attractif pour les concepteurs. Pour repondre aux specifications de la radiocommunication mobile, la structure classique du filtre a ete optimisee pour reduire le facteur du bruit et augmenter la dynamique, ainsi une nouvelle architecture (filtre LC a capacites commutees) a ete proposee. Des simulations ont ete realisees sur l'ensemble du circuit afin de prevoir les degradations eventuelles qui peuvent etre generees par ces circuits lors d'une transmission numerique (ex. p/4-DQPSK) et d'etudier ainsi l'impact du bruit de phase (gigue temporelle) genere par le circuit de commande sur le comportement du filtre. Parallelement, un prototype compose d'un filtre LC a capacites commutees et de son circuit de commande a ete fabrique en technologie standard BiCMOS 0,35 mm, sur une puce de taille de 1,1 x 1,75 mm². Ce premier circuit a permis de prouver la faisabilite de cette architecture dans le domaine des RF. Les resultats experimentaux confirment les simulations et sont susceptibles de rendre cette architecture originale attractive pour des applications radiofrequences.

4 citations

References
More filters
Book
01 Jan 1977
TL;DR: In this article, the authors combine bipolar, CMOS and BiCMOS analog integrated circuits into a unified treatment that stresses their commonalities and highlights their differences, and provide valuable insights into the relative strengths and weaknesses of these important technologies.
Abstract: The Fifth Edition of this academically rigorous text provides a comprehensive treatment of analog integrated circuit analysis and design starting from the basics and through current industrial practices. The authors combine bipolar, CMOS and BiCMOS analog integrated-circuit design into a unified treatment that stresses their commonalities and highlights their differences. The comprehensive coverage of the material will provide the student with valuable insights into the relative strengths and weaknesses of these important technologies.

4,717 citations

Journal ArticleDOI
Bram Nauta1
TL;DR: In this article, a linear, tunable integrator for very high-frequency integrated filters can be made, which has good linearity properties and non-dominant poles in the gigahertz range owing to the absence of internal nodes.
Abstract: CMOS circuits for integrated analog filters at very high frequencies, based on transconductance-C integrators, are presented. First a differential transconductance element based on CMOS inverters is described. With this circuit a linear, tunable integrator for very-high-frequency integrated filters can be made. This integrator has good linearity properties and nondominant poles in the gigahertz range owing to the absence of internal nodes. The integrator has a tunable DC gain, resulting in a controllable integrator quality factor. Experimental results of a VHF CMOS transconductance-C low-pass filter realized in a 3- mu m CMOS process are given. Both the cutoff frequency and the quality factors can be tuned. The cutoff frequency was tuned from 22 to 98 MHz and the measured filter response is very close to the ideal response of the passive prototype filter. Furthermore, a novel circuit for automatically tuning the quality factors of integrated filters built with these transconductors is described. >

674 citations

Journal ArticleDOI
TL;DR: In this paper, some novel circuit techniques for realizing linear CMOS tranconductance elements are proposed, which have superior linearity and input voltage range compared with the conventional source-coupled differential pair.
Abstract: Some novel circuit techniques for realizing linear CMOS tranconductance elements are proposed. The circuits discussed have superior linearity and input voltage range compared with the conventional source-coupled differential pair. Design tradeoffs are examined and computer simulation results are used to verify theoretical predictions. The results show close agreement between predicted behavior and simulated performance.

343 citations

Book
01 Jan 1994
TL;DR: BiCMOS analogue building blocks sampled-data signal processing continuous-time signal processing current-mode signal processing analogue VLSI neural information processing data converters statistical modelling and simulation of analogue analogue CAD interconnects in analogue V LSI analogueVLSI design-for-test analogue integrated sensors.
Abstract: CMOS analogue building blocks BiCMOS analogue building blocks sampled-data signal processing continuous-time signal processing current-mode signal processing analogue VLSI neural information processing data converters statistical modelling and simulation of analogue analogue CAD interconnects in analogue VLSI analogue VLSI design-for-test analogue integrated sensors.

329 citations

Journal ArticleDOI
TL;DR: A simple CMOS circuit technique for realizing both linear transconductance and a precision square-law function is described, which is versatile in application and diverse applications are demonstrated in the fields of linear amplifiers, continuous-time filters, and nonlinear function implementation.
Abstract: A simple CMOS circuit technique for realizing both linear transconductance and a precision square-law function is described. The circuit provides two separate outputs in the linear as well as square-law modes. The linear outputs both have a range of 100% or more of the total quiescent current value. The theory of operation is presented and effects of transistor nonidealities on the performance are investigated. Design optimization techniques are developed. Experimental results measured on nonoptimized prototypes are: distortion of 0.2% for input signals up to 2.4 V/SUB p-p/ in the case of linear transfer function and 1.3% in the case of the square-law transfer function, with a DC to -3-dB bandwidth of up to 20 MHz. Improved performance is expected when the optimization techniques developed are applied. The circuit is versatile in application: diverse applications are demonstrated in the fields of linear amplifiers, continuous-time filters, and nonlinear function implementation.

327 citations