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High-performance CMOS variability in the 65-nm regime and beyond. IBM J Res And Dev

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The article was published on 2006-01-01 and is currently open access. It has received 218 citations till now. The article focuses on the topics: IBM.

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Citations
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Journal ArticleDOI

Techniques for Design and Implementation of Secure Reconfigurable PUFs

TL;DR: It is demonstrated how reconfigurability can be exploited to eliminate the stated PUF limitations and how FPGA-based PUFs can be used for privacy protection.
Book ChapterDOI

Hardware-Based Public-Key Cryptography with Public Physically Unclonable Functions

TL;DR: Using PPUFs, this work has developed conceptually new secret key exchange and public key protocols that are resilient against physical and side channel attacks and do not employ unproven mathematical conjectures.
Journal ArticleDOI

Modeling Process Variability in Scaled CMOS Technology

TL;DR: This article provides a comprehensive view on the predominant variation sources in sub-90-nm devices, their impact on device and circuit performance, and various modeling approaches for statistical circuit analysis.

A Variation-Tolerant Sub-200 mV 6-T

TL;DR: In this article, a sub-threshold 6-T SRAM architecture with gated feedback write-assist was proposed, which was fabricated in an industrial 0.13 m CMOS technology.
Book ChapterDOI

Trusted Integrated Circuits: A Nondestructive Hidden Characteristics Extraction Approach

TL;DR: A methodology for unique identification of integrated circuits (ICs) that addresses untrusted fabrication and other security problems, and introduces a number of novel security and authentication protocols, such as hardware metering, challenge-based authentication and prevention of software piracy.
References
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Journal ArticleDOI

Techniques for Design and Implementation of Secure Reconfigurable PUFs

TL;DR: It is demonstrated how reconfigurability can be exploited to eliminate the stated PUF limitations and how FPGA-based PUFs can be used for privacy protection.
Book ChapterDOI

Hardware-Based Public-Key Cryptography with Public Physically Unclonable Functions

TL;DR: Using PPUFs, this work has developed conceptually new secret key exchange and public key protocols that are resilient against physical and side channel attacks and do not employ unproven mathematical conjectures.
Journal ArticleDOI

A Variation-Tolerant Sub-200 mV 6-T Subthreshold SRAM

TL;DR: This paper proposes a single-ended 6-T SRAM design with a gated-feedback write-assist that remains robust deep in the subth threshold regime and provides a 36% improvement in energy consumption over the previously proposed multiplexer-based subthreshold SRAM designs while using only half the area.
Journal ArticleDOI

Statistical Threshold-Voltage Variability in Scaled Decananometer Bulk HKMG MOSFETs: A Full-Scale 3-D Simulation Scaling Study

TL;DR: In this paper, the authors present a comprehensive full-scale three-dimensional simulation scaling study of the statistical threshold-voltage variability in bulk high-k/metal gate (HKMG) MOSFETs with gate lengths of 35, 25, 18, and 13 nm.
Journal ArticleDOI

Modeling Process Variability in Scaled CMOS Technology

TL;DR: This article provides a comprehensive view on the predominant variation sources in sub-90-nm devices, their impact on device and circuit performance, and various modeling approaches for statistical circuit analysis.