Book ChapterDOI
Implementation of MAC Unit Using Reversible Logic
R. Dhanabal,V. Bharathi +1 more
- pp 343-350
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TLDR
4 × 4 irreversible MAC has been compared with reversible MAC and it has been found that, there is 25.6 % reduction in the power consumption.Abstract:
Reversible quantum logic plays an important role in quantum computing. This paper proposes implementation of MAC unit using reversible logic. We have discussed all the elementary reversible logic gates which are used in the design. Here, 4 × 4 irreversible MAC has been compared with reversible MAC and it has been found that, there is 25.6 % reduction in the power consumption. The design has been simulated using ModelSim and synthesized using Cadence RTL compiler.read more
References
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Journal ArticleDOI
Reversible logic synthesis with Fredkin and Peres gates
James Donald,Niraj K. Jha +1 more
TL;DR: This article extends RMRLS, a reversible logic synthesis tool, to include additional gate types, and finds that these additional gates reduce the average gate count for three-variable functions from 6.10 to 4.56, and improve the synthesis results of many larger functions, both in terms of gate count and quantum cost.
Design of 16-bit low power alu - dbgpu
TL;DR: In this paper the main concern is given for reducing the power of the adder and multiplier modules which are important functional units of ALU thereby reducing the overall power consumption without compromising the speed of the processor.
Proceedings ArticleDOI
Design and implementation of low power floating point arithmetic unit
TL;DR: This paper proposes implementation of IEEE floating point multiplication, addition and subtraction according to the IEEE 754 FP standard and proposes the efficient way of solving these challenges for the implementation.
Proceedings ArticleDOI
Implementation of floating point MAC using Residue Number System
R. Dhanabal,V. Barathi,Sarat Kumar Sahoo,Naamatheertham R. Samhitha,Neethu Acha Cherian,Pretty Mariam Jacob +5 more
TL;DR: The design and implementation of 16-bit floating point RNS Multiply and Accumulate (MAC) unit is presented, which can make use of any of the conventional adders that depends on the moduli of the RNS being used.
Comparison of Existing Multipliers and Proposal of a New Design for Optimized Performance
TL;DR: This paper formulates a comparative study of some of the well known existing multipliers and thereafter proposes a robust design of a multiplier with a carry-look-ahead adder.