Integrated physics-oriented statistical modeling, simulation, and optimization (MESFETs)
01 Jul 1992-IEEE Transactions on Microwave Theory and Techniques (IEEE)-Vol. 40, Iss: 7, pp 1374-1400
TL;DR: In this paper, a large-signal physics-based model is integrated into the harmonic balance equations for simulation of nonlinear circuits, involving an efficient Newton update, and exploited in a gradient-based FAST (feasible adjoint sensitivity technique) circuit optimization technique.
Abstract: Physics-based modeling of MESFETs is addressed from the point of view of efficient simulation, accurate behavior prediction and robust parameter extraction. A novel integration of a large-signal physics-based model into the harmonic balance equations for simulation of nonlinear circuits, involving an efficient Newton update, is presented and exploited in a gradient-based FAST (feasible adjoint sensitivity technique) circuit optimization technique. For yield-driven MMIC design a relevant physics-based statistical modeling methodology is presented. Quadratic approximation of responses and gradients suitable for yield optimization is discussed. The authors verify their theoretical contributions and exemplify their computational results using built-in and user-programmable modeling capabilities of the CAE systems OSA90/hope and HarPE. Results of device modeling using a field-theoretic nonlinear device simulator are reported. >
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TL;DR: This paper presents a new approach to microwave circuit optimization and statistical design featuring neural network models at either device or circuit levels, which has the capability to handle high-dimensional and highly nonlinear problems.
Abstract: The trend of using accurate models such as physics-based FET models, coupled with the demand for yield optimization results in a computationally challenging task. This paper presents a new approach to microwave circuit optimization and statistical design featuring neural network models at either device or circuit levels. At the device level, the neural network represents a physics-oriented FET model yet without the need to solve device physics equations repeatedly during optimization. At the circuit level, the neural network speeds up optimization by replacing repeated circuit simulations. This method is faster than direct optimization of original device and circuit models. Compared to existing polynomial or table look-up models used in analysis and optimization, the proposed approach has the capability to handle high-dimensional and highly nonlinear problems. >
277 citations
TL;DR: Some modern trends in nonlinear (NL) microwave circuit optimization based on electromagnetic (EM) simulation are discussed, including space mapping, domain partitioning, and neural-network modeling of the passive subnetwork and/or of its most critical parts.
Abstract: This paper discusses some modern trends in nonlinear (NL) microwave circuit optimization based on electromagnetic (EM) simulation. In order to keep the CPU time required for a typical design within acceptable limits, the number of expensive EM analyses must be kept under tight control. This may be obtained by resorting to a systematic implementation of some modern algorithmic concepts such as space mapping, domain partitioning, and neural-network modeling of the passive subnetwork and/or of its most critical parts. Although these techniques are well established for linear microwave circuit design coupled with EM analysis, their extension to the NL case is not trivial, and deserves a specialized treatment. Several examples are presented in order to give a feeling of the state-of-the-art of NL/EM optimization.
97 citations
Cites background from "Integrated physics-oriented statist..."
...While this may not be the case for an individual design, the advantage may become dramatic for very repetitive and CPU-intensive tasks such as statistical (yield-driven) design [26], [ 62 ]–[64]....
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Proceedings Article•
01 Jan 1986
TL;DR: In this paper, doubleur de frequence a transistor a effet de champ, conception d'un amplificateur de puissance avec reduction de la distorsion d'intermodulation, amplificateurs limiteur
Abstract: Illustration par trois exemples: doubleur de frequence a transistor a effet de champ, conception d'un amplificateur de puissance avec reduction de la distorsion d'intermodulation, amplificateur limiteur
59 citations
23 May 1994
TL;DR: This paper presents a new approach to microwave circuit analysis and optimization featuring neural network models at either device or circuit levels, which has the potential to handle high-dimensional and highly nonlinear problems.
Abstract: This paper presents a new approach to microwave circuit analysis and optimization featuring neural network models at either device or circuit levels. At the device level, the neural network represents a physics-oriented FET model yet without the need to solve device physics equations repeatedly during optimization. At the circuit level, the neural network speeds up optimization by replacing repeated circuit simulations. Compared to existing polynomial or table look up models used in analysis and optimization, the proposed approach has the potential to handle high-dimensional and highly nonlinear problems. >
53 citations
TL;DR: In this article, the discrete-dopant-induced high-frequency characteristic fluctuation of 16-nm-gate metal-oxide-semiconductor field effect transistors (MOSFET) circuit under high frequency regime is quantitatively studied.
Abstract: As the dimension of semiconductor device shrunk into nanometer scale (nanoscale), characteristic fluctuation is more pronounced, and become crucial for circuit design. In this paper, discrete-dopant-induced characteristic fluctuation of 16-nm-gate metal-oxide-semiconductor field effect transistors (MOSFET) circuit under high-frequency regime is quantitatively studied. The circuit gain, the 3 dB bandwidth and the unity-gain bandwidth of the tested nanoscale transistor circuit are calculated concurrently capturing the discrete-dopant-number- and discrete- dopant-position-induced fluctuations in the large-scale statistically sound ldquoatomisticrdquo device/circuit coupled simulation. For the 16-nm-gate MOSFET circuit, the number of discrete dopants, varying from zero to 14, may result in 5.7% variation of the circuit gain, 14.1% variation of the 3 dB bandwidth, and 10.4% variation of the unity-gain bandwidth. To suppress the high-frequency characteristic fluctuations, an improved doping distribution along the longitudinal diffusion direction from the MOSFET's surface to substrate is further performed to examine the associated fluctuation. The improved vertical doping profile with less dopants locating near surface of channel effectively reduces the fluctuations of the circuit gain, the 3 dB bandwidth and the unity-gain bandwidth dramatically. Compared with the original doping profile, the reduction is 32.3%, 19.4% and 51.8%, respectively. This study provides an insight into random-dopant-induced intrinsic high-frequency characteristic fluctuations and verifies the potential fluctuation suppression technique on high-frequency characteristic fluctuations of nanoscale transistor circuit.
52 citations
Additional excerpts
...ponents of the circuit design methodology [8]–[12]....
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References
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TL;DR: In this article, the authors discuss certain modifications to Newton's method designed to reduce the number of function evaluations required during the iterative solution process of an iterative problem solving problem, such that the most efficient process will be that which requires the smallest number of functions evaluations.
Abstract: solution. The functions that require zeroing are real functions of real variables and it will be assumed that they are continuous and differentiable with respect to these variables. In many practical examples they are extremely complicated anld hence laborious to compute, an-d this fact has two important immediate consequences. The first is that it is impracticable to compute any derivative that may be required by the evaluation of the algebraic expression of this derivative. If derivatives are needed they must be obtained by differencing. The second is that during any iterative solution process the bulk of the computing time will be spent in evaluating the functions. Thus, the most efficient process will tenid to be that which requires the smallest number of function evaluations. This paper discusses certain modificatioins to Newton's method designed to reduce the number of function evaluations required. Results of various numerical experiments are given and conditions under which the modified versions are superior to the original are tentatively suggested.
2,481 citations
01 Nov 1952
TL;DR: In this article, the authors proposed a new form of transistor called unipolar field effect transistor, which is of the "field effect" type in which the conductivity of a layer of semiconductor is modulated by a transverse electric field.
Abstract: The theory for a new form of transistor is presented. This transistor is of the "field-effect" type in which the conductivity of a layer of semiconductor is modulated by a transverse electric field. Since the amplifying action involves currents carried pre-dominantly by one kind of carrier, the name "unipolar" is proposed to distinguish these transistors from point-contact and junction types, which are "bipolar" in this sense. Regarded as an analog for a vacuum-tube triode, the unipolar field-effect transistor may have a m? of 10 or more, high output resistance, and a frequency response higher than bipolar transistors of comparable dimensions.
645 citations
TL;DR: In this article, a GaAs FET model suitable for SPICE circuit simulations is developed, where the dc equations are accurate to about 1 percent of the maximum drain current, and a simple interpolation formula for drain current as a function of gate-to-source voltage connects the square-law behavior just above pinchoff and the square root law for larger values of the drain current.
Abstract: We have developed a GaAs FET model suitable for SPICE Circuit simulations. The dc equations are accurate to about 1 percent of the maximum drain current. A simple but accurate interpolation formula for drain current as a function of gate-to-source voltage connects the square-law behavior just above pinchoff and the square-root law for larger values of the drain current. The ac equations, with charge-storage elements, describe the variation of the gate-to-source and gate-to-drain capacitances as the drain-to-source voltage approaches zero and when this voltage becomes negative. Under normal operating conditions the gate-to-source capacitance is much larger than the gate-to-drain capacitance. At zero drain-to-source voltage both capacitances are about equal. For negative drain-to-source voltages the original source acts like a drain and vice versa. Consequently the normally large gate-to-source capacitance becomes small and acts like a gate-to-drain capacitance. In order to model these effect it is necessary to realize that, contrary to conventional SPICE usage, there are no separate gate-to-source and gate-to-drain charges, but that there is only one gate Charge which is a function of gate-to-source and gate-to-drain voltages. The present treatment Of these capacitances permits simulations-in which the drain-to-source voltage reverses polarity, as occurs in pass-gate circuits.
520 citations
01 Dec 1971
TL;DR: Results, both old and new, which will aid the reader in applying Volterra-series-type analyses to systems driven by sine waves or Gaussian noise are presented.
Abstract: Troublesome distortions often occur in communication systems. For a wide class of systems such distortions can be computed with the help of Volterra series. Results, both old and new, which will aid the reader in applying Volterra-series-type analyses to systems driven by sine waves or Gaussian noise are presented. The n-fold Fourier transform G n of the nth Volterra kernel plays an important role in the analysis. Methods of computing G n from the system equations are described and several special systems are considered. When the G n are known, items of interest regarding the output can be obtained by substituting the G n in general formulas derived from the Volterra series representation. These items include expressions for the output harmonics, when the input is the sum of two or three sine waves, and the power spectrum and various moments, when the input is Gaussian. Special attention is paid to the case in which the Volterra series consists of only the linear and quadratic terms.
479 citations
TL;DR: In this article, the authors examined the signal and noise properties of gallium arsenide (GaAs) microwave field effect transistors (FETs) and found that radiofrequency instabilities due to this region, if they exist, occur at frequencies far above the normal frequency regime of microwave FETs.
Abstract: Publisher Summary This chapter examines the signal and noise properties of gallium arsenide (GaAs) microwave field-effect transistors (FET) High frequency gallium arsenide field-effect transistors (GaAs FETs) have demonstrated remarkably low noise figures and high power gains at microwave frequencies A practical microwave GaAs FET is usually fabricated by deposition or diffusion of source, gate, and drain contacts on the surface of an appropriately doped thin epitaxial n-type layer This layer, in turn, is grown on a semi-insulating wafer by either a vapor or liquid epitaxial technique The apparent minor role played by the negative resistance region in practical short-gate FETs suggests that radiofrequency instabilities due to this region, if they exist, occur at frequencies far above the normal frequency regime of microwave FETs The small-signal equivalent circuit of the FET, valid up to moderately high frequencies is elaborated It is found that noise in a microwave GaAs FET is produced both by sources intrinsic to the device and by thermal sources associated with the parasitic resistances
471 citations