scispace - formally typeset
Patent

Intelligent layout of composite data structures in tiered storage

Reads0
Chats0
TLDR
In this article, the optimal storage of data structures in a hierarchy of memory types has been studied in terms of the latency cost for each of a plurality of fields in an object, and determining whether to store the at least one field to a first memory device or a second memory device based on this latency cost.
Abstract
Aspects of the subject technology relate to ways to determine the optimal storage of data structures in a hierarchy of memory types. In some aspects, a process of the technology can include steps for determining a latency cost for each of a plurality of fields in an object, identifying at least one field having a latency cost that exceeds a predetermined threshold, and determining whether to store the at least one field to a first memory device or a second memory device based on the latency cost. Systems and machine-readable media are also provided.

read more

References
More filters
Proceedings ArticleDOI

NV-Heaps: making persistent objects fast and safe with next-generation, non-volatile memories

TL;DR: A lightweight, high-performance persistent object system called NV-heaps is implemented that provides transactional semantics while preventing these errors and providing a model for persistence that is easy to use and reason about.
Proceedings ArticleDOI

Consistent and durable data structures for non-volatile byte-addressable memory

TL;DR: This paper presents Consistent and Durable Data Structures (CDDSs), a single-level data store that, on current hardware, allows programmers to safely exploit the low-latency and non-volatile aspects of new memory technologies.
Patent

Non-volatile memory and method with non-sequential update block management

TL;DR: In this article, an index of the logical units in a non-sequential update block is buffered in RAM and stored periodically into the non-volatile memory, where the index is stored in the header of each logical unit.
Proceedings ArticleDOI

Data tiering in heterogeneous memory systems

TL;DR: The contribution of this paper is the design and implementation of a set of libraries and automatic tools that enables programmers to achieve optimal data placement with minimal effort on their part and shows that it is indeed possible to use a mix of a small amount of fast DRAM and large amounts of slower NVM without a proportional impact to an application's performance.
Patent

Erasure coding across multiple zones and sub-zones

TL;DR: In this paper, a data chunk is divided into a plurality of sub-fragments, and each of the plurality of reconstruction parities comprises at least one cross-zone parity.