# Interface synthesis and protocol conversion

TL;DR: The problem of synthesising an interface R such that P composed with R refines Q is investigated, and it is shown that a solution exists iff P and Q are compatible, and the most general solution is given by(P \parallel Q^\ Bot)^\bot, where P is the interface P with inputs and outputs interchanged.

Abstract: Given deterministic interfaces P and Q, we investigate the problem of synthesising an interface R such that P composed with R refines Q. We show that a solution exists iff P and $$Q^\bot$$ are compatible, and the most general solution is given by $$(P \parallel Q^\bot)^\bot$$, where $$P^\bot$$ is the interface P with inputs and outputs interchanged. Remarkably, the result holds both for asynchronous and synchronous interfaces. We model interfaces using the interface automata formalism of de Alfaro and Henzinger. For the synchronous case, we give a new definition of synchronous interface automata based on Mealy machines and show that the result holds for a weak form of nondeterminism, called observable nondeterminism. We also characterise solutions to the synthesis problem in terms of winning input strategies in the automaton $$(P \otimes Q^\bot)^\bot$$, and the most general solution in terms of the most permissive winning strategy. We apply the solution to the synthesis of converters for mismatched protocols in both the asynchronous and synchronous domains. For the asynchronous case, this leads to automatic synthesis of converters for incompatible network protocols. In the synchronous case, we obtain automatic converters for mismatched intellectual property blocks in system-on-chip designs. The work reported here is based on earlier work on interface synthesis in Bhaduri (Third international symposium on automated technology for verification and analysis, ATVA 2005, pp 338–353, 2005) for the asynchronous case, and Bhaduri and Ramesh (Sixth international conference on application of concurrency to system design, ACSD 2006, pp 208–216) for the synchronous one.

## Summary (2 min read)

### 1. Introduction

- Interfaces play a central role in component based design and verification of systems.
- Interface automata are a formalism for reasoning about composition and refinement of component interfaces in terms of the protocol aspects of component behaviour.
- The controller synthesis problem and its solution as a winning strategy in a game has a long history, going back to Büchi and Landwebers’ solution of Church’s problem [BL69].
- Recent work on agent algebras [BPSV03, Pas04] formalises the notions of composition and conformance in an abstract algebraic framework, and makes use of the mirror function in an essential way.

### 2. Asynchronous Interfaces: Interface Automata

- In this section the authors define interface automata and their composition and refinement.
- Throughout this work the authors consider only deterministic interface automata.
- This is in contrast to the original version defined in [dAH01], where an input and an output action with the same name combine to give an internal action.
- The authors call these states backward compatible.
- This implies there is an input strategy πI for P ⊗Q which avoids all locally incompatible states starting from s0P⊗Q, no matter what the output strategy is.

### 3. Synthesis of Interface Automata

- The synthesis problem for interface automata is as follows.
- Here Fig. 1 presents three examples to illustrate the synthesis idea with given interface automata P and Q.
- The solution is essentially identical with Q, except for the polarity of action b. Notation First the authors prove a result about compatibility that is used in Theorem 3.3 below.

### 4. Winning Strategies and Synthesis

- Since the orders are lattices, the most permissive strategy exists, as is given by the lattice join.
- The authors then show that the parallel composition P ‖ Q can be extracted from the most permissive winning strategy for Input.
- Note that the bottom elements are the empty strategies, which are allowed by the definition of strategies.
- From Definition 2.10, this implies that the set T of backward compatible states is empty, and hence by Definition 2.11 the composition P ‖ Q is empty.
- The complexity of the algorithm is linear in the size of the game graph.

### 5. Application: Network Protocol Conversion

- In today’s world, global communication over heterogeneous networks of computers can often lead to protocol mismatches between communicating entities.
- The authors illustrate the use of interface synthesis to the protocol conversion problem through an example adapted from [KNM97].
- When the authors want the two protocols above to work together without causing any inconsistency by using a converter, they need to specify what the converter is allowed and not allowed to do.
- The specification S for the converter relates the two actions sets by specifying temporal ordering of actions.

### 6. Synchronous Interface Automata

- In earlier sections the authors have presented the synthesis problem and its solution for interface automata, a formalism intended for component-based modelling and development of asynchronous systems.
- The authors SIA model essentially defines Mealy automata with explicit input assumptions and output guarantees.
- The game view of interface composition and refinement then applies mutatis mutandis to the synchronous setting.
- Let P and Q be two SIA with I/O signatures as above.

### 7. Synthesis of Synchronous Interfaces

- Here P⊥ has the same interpretation as in the asynchronous case.
- First the authors prove a result about compatibility that is used in Theorem 7.2 below.
- The complexity of computing (P ‖ Q⊥)⊥ is again O(|P ||Q|) using the standard iterative refinement technique as in the asynchronous case.

### 8. Converter Synthesis

- In this section the authors show how the SIA framework and the interface synthesis procedure described in Section 7 can be used to synthesise a protocol converter for two IP blocks that have incompatible protocols of interaction.
- Sometimes the authors indicate a don’t care explicitly by a signal T. Fig. 7 illustrates the synchronous interfaces for two mismatched protocols.
- The authors ignore all data values such as addresses, and consider only boolean control values.
- The authors require that the system as a whole (the two protocols along with the converter) satisfies the interface described by Fig.

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##### Frequently Asked Questions (2)

###### Q2. What have the authors stated for future works in "Interface synthesis and protocol conversion" ?

As future work, the authors would like to relax some restrictions they have put on the synchronous interface model, such as the requirement of observable nondeterminism. Other possibilities would be to include the effect of hiding internal signals and including fairness specifications to both asynchronous and synchronous interfaces. The work on agent algebras related to semantic foundations for heterogeneous systems ( see [ Pas04 ] ) has a similar goal, and it will be interesting to investigate the connections between the two. The authors are grateful to the anonymous referees for suggesting many improvements in the presentation.