Investigating the impact of bti and hci on log-domain based mihalas–niebur neuron circuit
29 Jan 2020-Vol. 659, pp 528-536
TL;DR: In this paper, the effects of process-temperature variations and also investigates the impact of Hot Carrier Injection (HCI), Bias Temperature Instability (BTI) on the performance of MN circuit.
Abstract: Neuromorphic circuits are becoming quite popular due to their ability to mimic the structure and behavior of human brain. Current research focuses on approximating spiking biological neuron behavior. Various neuron models have been proposed in the past that aid in investigating the behavior of neuronal systems mathematically. Mihalas–Niebur (MN) neuron model is one among them. In this paper log-domain based MN neuron model is implemented at 45 nm technology node. The paper studies the effects of process-temperature variations and also investigates the impact of Hot Carrier Injection (HCI), Bias Temperature Instability (BTI) on the performance of MN circuit. Average power consumption and spiking frequency are chosen as key performance measures to analyze the circuit performance before and after degradation.
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21 May 2004
TL;DR: The authors draw upon extensive industry and classroom experience to introduce todays most advanced and effective chip design practices, and present extensively updated coverage of every key element of VLSI design, and illuminate the latest design challenges with 65 nm process examples.
Abstract: For both introductory and advanced courses in VLSI design, this authoritative, comprehensive textbook is highly accessible to beginners, yet offers unparalleled breadth and depth for more experienced readers. The Fourth Edition of CMOS VLSI Design: A Circuits and Systems perspective presents broad and in-depth coverage of the entire field of modern CMOS VLSI Design. The authors draw upon extensive industry and classroom experience to introduce todays most advanced and effective chip design practices. They present extensively updated coverage of every key element of VLSI design, and illuminate the latest design challenges with 65 nm process examples. This book contains unsurpassed circuit-level coverage, as well as a rich set of problems and worked examples that provide deep practical insight to readers at all levels.
2,237 citations
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University of Zurich1, Spanish National Research Council2, University of New South Wales3, University of Sydney4, Johns Hopkins University5, University of Manchester6, University of Oslo7, Centre national de la recherche scientifique8, Heidelberg University9, University of California, San Diego10, Stanford University11, Howard Hughes Medical Institute12
TL;DR: The most common building blocks and techniques used to implement these circuits, and an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin–Huxley models to bi-dimensional generalized adaptive integrate and fire models.
Abstract: Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain-machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin-Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips.
1,330 citations
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TL;DR: A comprehensive model for NBTI phenomena within the framework of the standard reaction–diffusion model is constructed and it is demonstrated how to solve the reaction-diffusion equations in a way that emphasizes the physical aspects of the degradation process and allows easy generalization of the existing work.
Abstract: Negative bias temperature instability has become an important reliability concern for ultra-scaled Silicon IC technology with significant implications for both analog and digital circuit design. In this paper, we construct a comprehensive model for NBTI phenomena within the framework of the standard reaction–diffusion model. We demonstrate how to solve the reaction–diffusion equations in a way that emphasizes the physical aspects of the degradation process and allows easy generalization of the existing work. We also augment this basic reaction–diffusion model by including the temperature and field-dependence of the NBTI phenomena so that reliability projections can be made under arbitrary circuit operating conditions.
679 citations
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TL;DR: This study describes a generalization of the leaky integrate-and-fire model that produces a wide variety of spiking behaviors while still being analytically solvable between firings.
Abstract: For simulations of neural networks, there is a trade-off between the size of the network that can be simulated and the complexity of the model used for individual neurons. In this study, we describe a generalization of the leaky integrate-and-fire model that produces a wide variety of spiking behaviors while still being analytically solvable between firings. For different parameter values, the model produces spiking or bursting, tonic, phasic or adapting responses, depolarizing or hyperpolarizing after potentials and so forth. The model consists of a diagonalizable set of linear differential equations describing the time evolution of membrane potential, a variable threshold, and an arbitrary number of firing-induced currents. Each of these variables is modified by an update rule when the potential reaches threshold. The variables used are intuitive and have biological significance. The model's rich behavior does not come from the differential equations, which are linear, but rather from complex update rules. This single-neuron model can be implemented using algorithms similar to the standard integrate-and-fire model. It is a natural match with event-driven algorithms for which the firing times are obtained as a solution of a polynomial equation.
134 citations
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TL;DR: Neuromorphic Engineering (NE) encompasses a diverse range of approaches to information processing that are inspired by neurobiological systems, and this feature distinguishes neuromorphic systems from conventional computing systems as discussed by the authors.
Abstract: Neuromorphic engineering (NE) encompasses a diverse range of approaches to information processing that are inspired by neurobiological systems, and this feature distinguishes neuromorphic systems from conventional computing systems. The brain has evolved over billions of years to solve difficult engineering problems by using efficient, parallel, low-power computation. The goal of NE is to design systems capable of brain-like computation. Numerous large-scale neuromorphic projects have emerged recently. This interdisciplinary field was listed among the top 10 technology breakthroughs of 2014 by the MIT Technology Review and among the top 10 emerging technologies of 2015 by the World Economic Forum. NE has two-way goals: one, a scientific goal to understand the computational properties of biological neural systems by using models implemented in integrated circuits (ICs); second, an engineering goal to exploit the known properties of biological systems to design and implement efficient devices for engineering applications. Building hardware neural emulators can be extremely useful for simulating large-scale neural models to explain how intelligent behavior arises in the brain. The principal advantages of neuromorphic emulators are that they are highly energy efficient, parallel and distributed, and require a small silicon area. Thus, compared to conventional CPUs, these neuromorphic emulators are beneficial in many engineering applications such as for the porting of deep learning algorithms for various recognitions tasks. In this review article, we describe some of the most significant neuromorphic spiking emulators, compare the different architectures and approaches used by them, illustrate their advantages and drawbacks, and highlight the capabilities that each can deliver to neural modelers. This article focuses on the discussion of large-scale emulators and is a continuation of a previous review of various neural and synapse circuits (Indiveri et al., 2011). We also explore applications where these emulators have been used and discuss some of their promising future applications.
112 citations
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