Latchup-free ESD protection design with complementary substrate-triggered SCR devices
Citations
224 citations
Cites methods from "Latchup-free ESD protection design ..."
...Moreover, some advanced trigger-assist circuit techniques had been also reported to enhance the turn-on speed of SCR device, such as the gate-coupled technique [21], the hot-carrier triggered technique [22], the GGNMOS-triggered technique [23], [24], the substrate-triggered technique [25], [26], double-triggered technique [27], native-NMOS-trigger technique [28], etc....
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...stacked diode string [26], had been reported to have 7-kV HBM ESD level and free to latchup issue in a 0....
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...Substrate-Triggered SCR (STSCR) [25], [26]...
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49 citations
Cites background from "Latchup-free ESD protection design ..."
...holding current of the proposed structure can be flexibly tuned to satisfy the latch-up immunity requirement [9]....
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Cites methods from "Latchup-free ESD protection design ..."
...The p-type substrate-triggered silicon-controlled rectifier (SCR) device is used as the main ESD clamping device [11]....
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References
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"Latchup-free ESD protection design ..." refers background in this paper
...I. INTRODUCTION ON-CHIP ESD protection circuits have to be added be-tween the input/output (I/O) pads and / to provide the desired electrostatic discharge (ESD) robustness in CMOS integrated circuits (ICs) [1]....
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