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Proceedings ArticleDOI

Low complexity variable-size block-matching motion estimation for adaptive motion compensation block size in H.264

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TLDR
An efficient merge-based algorithm for variable-size block matching ME (motion estimation) to reduce the computation of block-size decision process in H.264 video encoder is proposed.
Abstract
An efficient merge-based algorithm for variable-size block matching ME (motion estimation) to reduce the computation of block-size decision process in H264 video encoder is proposed Fixed-size 4 /spl times/ 4 small blocks are used for the integer-pixel accuracy full search ME and several candidate MVs are reserved for each 4 /spl times/ 4 blocks to determined if the neighboring blocks could be merge into other predefined block types or not Simulation result shows the computational load of our method is significantly reduced than H264 JM 73

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Citations
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Proceedings ArticleDOI

Fast Motion Estimation by Motion Vector Merging Procedure for H. 264

TL;DR: Experimental results show that the proposed method has lower computational complexity than full search, fast full search and fast motion estimation of the H.264 reference software JM93 with slight quality decrease and little bit-rate increase.
Journal ArticleDOI

Small-diamond-based search algorithm for fast block motion estimation

TL;DR: A multi-stage motion estimation algorithm that ensures getting good video quality while decreases the motion search time efficiently and is also suitable for variable block-size motion estimation.
Proceedings ArticleDOI

A Motion Vector Coding Scheme Based on Bottom-Up Merging Procedure

TL;DR: Experimental results show that the proposed scheme can reduce about 50% motion vector coding bits as compared to the conventional way of storing motion vectors for each macroblock.
Journal ArticleDOI

Algorithm and Software Optimization of Variable Block Size Motion Estimation for H.264/AVC on a VLIW---SIMD DSP

TL;DR: The SAD_Reuse method which has a regular structure is chosen for VBSME not only to remove redundant sum of absolute difference (SAD) operations but also to utilize the instruction level parallelism (ILP) and data level Parallelism (DLP) of the architecture.
Proceedings ArticleDOI

Efficient Hardware Implementation for H.264/AVC Motion Estimation

TL;DR: Experimental results indicate that more than 100% performance improvement is achieved by the proposed architectures compared to the state-of-the-art architectures with similar resources.
References
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Journal ArticleDOI

Variable size block matching motion compensation with applications to video coding

TL;DR: A new motion compensation scheme based on block matching is presented, where the size for each block is variable and the proposed algorithm adaptively divides the image into blocks of vari- able size to meet the assumption on uniform motion for all blocks.
Journal ArticleDOI

Quadtree-structured variable-size block-matching motion estimation with minimal error

TL;DR: Two efficient quadtree-based algorithms for variable-size block matching (VSBM) motion estimation that employ an efficient dynamic programming technique utilizing the special structure of a quadtree and a heuristic way to select variable-sized square blocks are reported.
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