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Proceedings ArticleDOI

Low Power Implantable Spike Sorting Scheme Based on Neuromorphic Classifier with Supervised Training Engine

TL;DR: An ultra-low power neural spike sorting technique for implantable, multi-channel neural implant is proposed, which involves spiking neural network with binary weights as an energy and area efficient classifier, along with a suitable frontend for spike encoding of the recorded neuro-potential.
Abstract: An ultra-low power neural spike sorting technique for implantable, multi-channel neural implant is proposed. It involves spiking neural network (SNN) with binary weights as an energy and area efficient classifier, along with a suitable frontend for spike encoding of the recorded neuro-potential. The proposed scheme employs two step training to implement supervised learning for the classifier, in order to achieve appreciable classification accuracy, along with low power dissipation. During the 1st phase a k-mean clustering module is trained with the real-time input data. In the 2nd phase, the trained means are used to perform supervised learning for the SNN classifier. After the training process, the low power SNN module is used for the classification task. In the proposed scheme, the K-means training module can be shared among large number of channels for training the dedicated SNN modules, which are relatively compact and can operate with ±4x lower power (as compared to the K-means sorter), while preserving the classification accuracy. Algorithm and architecture level optimizations for the proposed system are presented.
Citations
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Journal Article
TL;DR: The paper discusses about the extreme learning machine (ELM) interface which has potential to restore the lost sensorimotor functions in people and a mathematical algorithm is introduced to record the neural activity inextreme learning machine interface.
Abstract: In the paper we discuss about the extreme learning machine (ELM) interface which has potential to restore the lost sensorimotor functions in people. The key element used in brainmachine interface (BMI) is neural decoder. Extreme learning machine interface controls the external devices by modulating their neural activity. A mathematical algorithm is introduced to record the neural activity in extreme learning machine interface. The proposed system utilizes a decoder to initialize the feedback approach. A motor ELM is modelled as closed loop control system, where the controller is brain. At last the proposed system takes limited number of input channels and reduces the number of programmable weights.

14 citations

Posted Content
TL;DR: A 2-step shared training scheme involving a K-means sorter and a Spiking Neural Network (SNN) is elaborated for on-chip training and classification and a low power SNN classifier scheme using memristive crossbar type architecture is compared with a fully digital implementation.
Abstract: In this paper authors have presented a power efficient scheme for implementing a spike sorting module. Spike sorting is an important application in the field of neural signal acquisition for implantable biomedical systems whose function is to map the Neural-spikes (N-spikes) correctly to the neurons from which it originates. The accurate classification is a pre-requisite for the succeeding systems needed in Brain-Machine-Interfaces (BMIs) to give better performance. The primary design constraint to be satisfied for the spike sorter module is low power with good accuracy. There lies a trade-off in terms of power consumption between the on-chip and off-chip training of the N-spike features. In the former case care has to be taken to make the computational units power efficient whereas in the later the data rate of wireless transmission should be minimized to reduce the power consumption due to the transceivers. In this work a 2-step shared training scheme involving a K-means sorter and a Spiking Neural Network (SNN) is elaborated for on-chip training and classification. Also, a low power SNN classifier scheme using memristive crossbar type architecture is compared with a fully digital implementation. The advantage of the former classifier is that it is power efficient while providing comparable accuracy as that of the digital implementation due to the robustness of the SNN training algorithm which has a good tolerance for variation in memristance.

4 citations


Cites background or methods from "Low Power Implantable Spike Sorting..."

  • ...different modes for conversion of N-spike to its digitized form and binary spike trains and the N-spike-detection block for detecting the on-set of N-spike have been discussed earlier [19]....

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  • ...The binary input data is trained using a modified version of Hebbian Spike Timing Dependent Plasticity (STDP) learning to obtain the trained binary weights [19] [21] [22]....

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  • ...The SNN trainer would consume less power as compared to the K-means clustering block [19]....

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  • ...Schematic of SNN Classifier using digital gates [19]....

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  • ...proposed a low power 2-step shared training scheme in which the unsupervised data is initially clustered by a K-means sorter block, after which a supervised power efficient SNN trainer computes the trained weights [19]....

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Proceedings ArticleDOI
01 Dec 2017
TL;DR: Power and area efficient architectural level storage schemes of digitized N-spikes recorded through multiple channels into a Single Port Random Access Memory (SPRAM) module have been compared.
Abstract: The recording of real time Neural-spikes (N-spikes) into an on-chip memory module is essential for processing the stored information having use in neurological applications like neural spike sorting. Spike sorting is a process used in bio-medical signal processing where incoming real-time spikes are mapped to the neuron from which it originates. In this paper, power and area efficient architectural level storage schemes of digitized N-spikes recorded through multiple channels into a Single Port Random Access Memory (SPRAM) module have been compared. The power dissipation of the proposed storage scheme is in the order of few μW. The architectural level analysis of the schemes has been performed in 0.18μm CMOS process technology using the Synopsys design compiler tool.

2 citations


Cites background from "Low Power Implantable Spike Sorting..."

  • ...a reasonably good approximation for balancing the trade off between complexity and accuracy [12]....

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Journal ArticleDOI
TL;DR: Wang et al. as mentioned in this paper proposed a spike sorting method combining Linear Discriminant Analysis (LDA) and Density Peaks (DP) for feature extraction and clustering, which achieved high sorting accuracy and robustness to noise.
Abstract: Spike sorting is a fundamental step in extracting single-unit activity from neural ensemble recordings, which play an important role in basic neuroscience and neurotechnologies. A few algorithms have been applied in spike sorting. However, when noise level or waveform similarity becomes relatively high, their robustness still faces a big challenge. In this study, we propose a spike sorting method combining Linear Discriminant Analysis (LDA) and Density Peaks (DP) for feature extraction and clustering. Relying on the joint optimization of LDA and DP: DP provides more accurate classification labels for LDA, LDA extracts more discriminative features to cluster for DP, and the algorithm achieves high performance after iteration. We first compared the proposed LDA-DP algorithm with several algorithms on one publicly available simulated dataset and one real rodent neural dataset with different noise levels. We further demonstrated the performance of the LDA-DP method on a real neural dataset from non-human primates with more complex distribution characteristics. The results show that our LDA-DP algorithm extracts a more discriminative feature subspace and achieves better cluster quality than previously established methods in both simulated and real data. Especially in the neural recordings with high noise levels or waveform similarity, the LDA-DP still yields a robust performance with automatic detection of the number of clusters. The proposed LDA-DP algorithm achieved high sorting accuracy and robustness to noise, which offers a promising tool for spike sorting and facilitates the following analysis of neural population activity.

1 citations

Journal ArticleDOI
TL;DR: Spike sorting is a set of techniques used to analyze extracellular neural recordings, attributing individual spikes to individual neurons as mentioned in this paper , and it has gained significant interest in neuroscience due to advances in implantable microelectrode arrays, capable of recording thousands of neurons simultaneously.
Abstract: Objective. Spike sorting is a set of techniques used to analyze extracellular neural recordings, attributing individual spikes to individual neurons. This field has gained significant interest in neuroscience due to advances in implantable microelectrode arrays, capable of recording thousands of neurons simultaneously. High-density electrodes, combined with efficient and accurate spike sorting systems, are essential for various applications, including brain machine interfaces (BMIs), experimental neural prosthetics, real-time neurological disorder monitoring, and neuroscience research. However, given the resource constraints of modern applications, relying solely on algorithmic innovation is not enough. Instead, a co-optimization approach that combines hardware and spike sorting algorithms must be taken to develop neural recording systems suitable for resource-constrained environments, such as wearable devices and BMIs. This co-design requires careful consideration when selecting appropriate spike-sorting algorithms that match specific hardware and use cases. Approach. We investigated the recent literature on spike sorting, both in terms of hardware advancements and algorithms innovations. Moreover, we dedicated special attention to identifying suitable algorithm-hardware combinations, and their respective real-world applicabilities. Main results. In this review, we first examined the current progress in algorithms, and described the recent departure from the conventional ‘3-step’ algorithms in favor of more advanced template matching or machine-learning-based techniques. Next, we explored innovative hardware options, including application-specific integrated circuits, field-programmable gate arrays, and in-memory computing devices (IMCs). Additionally, the challenges and future opportunities for spike sorting are discussed. Significance. This comprehensive review systematically summarizes the latest spike sorting techniques and demonstrates how they enable researchers to overcome traditional obstacles and unlock novel applications. Our goal is for this work to serve as a roadmap for future researchers seeking to identify the most appropriate spike sorting implementations for various experimental settings. By doing so, we aim to facilitate the advancement of this exciting field and promote the development of innovative solutions that drive progress in neural engineering research.
References
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Journal ArticleDOI
TL;DR: A new method for detecting and sorting spikes from multiunit recordings that combines the wave let transform with super paramagnetic clustering, which allows automatic classification of the data without assumptions such as low variance or gaussian distributions is introduced.
Abstract: This study introduces a new method for detecting and sorting spikes from multiunit recordings The method combines the wavelet transform, which localizes distinctive spike features, with superparamagnetic clustering, which allows automatic classification of the data without assumptions such as low variance or gaussian distributions Moreover, an improved method for setting amplitude thresholds for spike detection is proposed We describe several criteria for implementation that render the algorithm unsupervised and fast The algorithm is compared to other conventional methods using several simulated data sets whose characteristics closely resemble those of in vivo recordings For these data sets, we found that the proposed algorithm outperformed conventional methods

2,050 citations


"Low Power Implantable Spike Sorting..." refers background or methods in this paper

  • ...Two-layer Network:The network used in this work has three output neurons, based on the maximum expected number of clusters (groups) in the datasets used [18]....

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  • ...It was observed that there is not much difference in accuracy between the two norms for datasets[18] with lower noise but with the increase in noise, clustering based on L2 norm outperforms that on L1 norm....

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Journal ArticleDOI
TL;DR: This article reviews algorithms and methods for detecting and classifying action potentials, a problem commonly referred to as spike sorting and discusses the advantages and limitations of each and the applicability of these methods for different types of experimental demands.
Abstract: The detection of neural spike activity is a technical challenge that is a prerequisite for studying many types of brain function. Measuring the activity of individual neurons accurately can be difficult due to large amounts of background noise and the difficulty in distinguishing the action potentials of one neuron from those of others in the local area. This article reviews algorithms and methods for detecting and classifying action potentials, a problem commonly referred to as spike sorting. The article first discusses the challenges of measuring neural activity and the basic issues of signal detection and classification. It reviews and illustrates algorithms and techniques that have been applied to many of the problems in spike sorting and discusses the advantages and limitations of each and the applicability of these methods for different types of experimental demands. The article is written both for the physiologist wanting to use simple methods that will improve experimental yield and minimize the selection biases of traditional techniques and for those who want to apply or extend more sophisticated algorithms to meet new experimental challenges.

1,378 citations


"Low Power Implantable Spike Sorting..." refers background or methods in this paper

  • ...Such timing scheme has been used in literature to ensure sufficient robustness towards shifts in Tonset.[17]....

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  • ...2), Input to the SNN are the spike-gen outputstreams for the fixed interval of 3Tspk, which constitutes of Tspkinterval before and 2Tspkinterval afterTonset.....

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  • ...Classification Process: Based on the classification accuracy, the SNN was found to be well trained after 1800 N-spikes i.e. 600 spikes of each cluster....

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  • ...Spike sorting algorithms based on computationally expensive algorithms like PCA, K-means clustering, SVM may give high matching accuracy, however, at the cost of relatively high power dissipation [13]....

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  • ...More complicated features can be employed at the cost of higher computation cost [17, 21]....

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Journal ArticleDOI
TL;DR: A state-of-the-art review of the development of spiking neurons and SNNs is presented, and insight into their evolution as the third generation neural networks is provided.
Abstract: Most current Artificial Neural Network (ANN) models are based on highly simplified brain dynamics. They have been used as powerful computational tools to solve complex pattern recognition, function estimation, and classification problems. ANNs have been evolving towards more powerful and more biologically realistic models. In the past decade, Spiking Neural Networks (SNNs) have been developed which comprise of spiking neurons. Information transfer in these neurons mimics the information transfer in biological neurons, i.e., via the precise timing of spikes or a sequence of spikes. To facilitate learning in such networks, new learning algorithms based on varying degrees of biological plausibility have also been developed recently. Addition of the temporal dimension for information encoding in SNNs yields new insight into the dynamics of the human brain and could result in compact representations of large neural networks. As such, SNNs have great potential for solving complicated time-dependent pattern recognition problems because of their inherent dynamic representation. This article presents a state-of-the-art review of the development of spiking neurons and SNNs, and provides insight into their evolution as the third generation neural networks.

694 citations

Journal ArticleDOI
08 May 2009
TL;DR: A 128-channel neural recording integrated circuit with on-the-fly spike feature extraction and wireless telemetry with computationally efficient spike detection and feature extraction algorithms attribute to an auspicious DSP implementation on-chip.
Abstract: This paper reports a 128-channel neural recording integrated circuit (IC) with on-the-fly spike feature extraction and wireless telemetry. The chip consists of eight 16-channel front-end recording blocks, spike detection and feature extraction digital signal processor (DSP), ultra wideband (UWB) transmitter, and on-chip bias generators. Each recording channel has amplifiers with programmable gain and bandwidth to accommodate different types of biological signals. An analog-to-digital converter (ADC) shared by 16 amplifiers through time-multiplexing results in a balanced trade-off between the power consumption and chip area. A nonlinear energy operator (NEO) based spike detector is implemented for identifying spikes, which are further processed by a digital frequency-shaping filter. The computationally efficient spike detection and feature extraction algorithms attribute to an auspicious DSP implementation on-chip. UWB telemetry is designed to wirelessly transfer raw data from 128 recording channels at a data rate of 90 Mbit/s. The chip is realized in 0.35 mum complementary metal-oxide-semiconductor (CMOS) process with an area of 8.8 times 7.2 mm2 and consumes 6 mW by employing a sequential turn-on architecture that selectively powers off idle analog circuit blocks. The chip has been tested for electrical specifications and verified in an ex vivo biological environment.

377 citations


"Low Power Implantable Spike Sorting..." refers background in this paper

  • ...Recently, there has been growing interest in integrating local processing in the implantable device, so that only compressed information may need to be transmitted wirelessly outside the body[3,12]....

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Proceedings ArticleDOI
01 Feb 2008
TL;DR: The chip is composed of eight 16-channel front-end blocks, data serializing circuits, a DSP for on-chip spike sorting, digital MUX, encoder, UWB TX, and bias generators.
Abstract: The chip is composed of eight 16-channel front-end blocks, data serializing circuits, a DSP for on-chip spike sorting, digital MUX, encoder, UWB TX, and bias generators The chip operates in one of the two modes In sorting mode, a selected channel is connected to the on-the-fly spike sorting block and the extracted features of the spikes are transmitted for off-chip classification In streaming mode, all the sampled data from the 128 channels are recorded and transmitted without any additional processing

183 citations


"Low Power Implantable Spike Sorting..." refers background in this paper

  • ...Electronics for neural signal acquisition and processinghas evolved significantly over the last few years, with number of channels goingbeyond 100 [1,11]....

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