Low Profile Integratable Inductor Fabricated Based on LTCC Technology for Microprocessor Power Delivery Applications
19 Mar 2007-IEEE Transactions on Components and Packaging Technologies (IEEE)-Vol. 30, Iss: 1, pp 170-177
TL;DR: In this paper, a low profile power inductor suitable for planar integration is designed and fabricated based on low temperature co-fired ceramics technology for microprocessor power delivery applications.
Abstract: A novel low profile power inductor suitable for planar integration is designed and fabricated based on low temperature co-fired ceramics technology for microprocessor power delivery applications. The inductor was designed to operate at a switching frequency of 4 to 5MHz, carrying a nominal dc current of 20A with a ripple current of 8 to 10A in a 5-V to 1-V dc-dc converter. The design and fabrication procedure is discussed in this paper, followed by small signal measurement and magnetic characterization results. The inductor was implemented in a prototype converter and the large signal measurement results are presented and its performance evaluated
Citations
More filters
TL;DR: In this paper, a review of the available technologies for inductor hybrid integration is given in accordance with low voltage and high current requirements, low-temperature co-fired ceramics (LTCC) technology is identified to be a suitable candidate for power electronics passives integration.
Abstract: A review of some of the available technologies for inductor hybrid integration is given in this paper. In accordance with low voltage and high current requirements, low-temperature co-fired ceramics (LTCC) technology is identified to be a suitable candidate for power electronics passives integration. This paper will discuss the various limitations of the current LTCC processing technique and introduce a fabrication technique which will open a new field for chip inductors for hybrid power electronics integration. The design of an LTCC inductor will also be presented. This inductor exhibits an inherent current dependent inductance, leading to high efficiency at low loads as an important systems advantage in portable electronics.
85 citations
Cites background or methods from "Low Profile Integratable Inductor F..."
...By virtue of the geometry of the LTCC planar inductor, there is a non-linear relationship between inductance and output current [28], [43]....
[...]
...For inductors made using LTCC tapes, the magnetic material can be NiCuZn [23], [24], [26] or NiZn [27], [28]....
[...]
TL;DR: In this article, a planar inductor made by mixed laminates of low-temperature sintered Ni-Cu-Zn ferrite tapes and metal-flake composite materials is used for high-density integration of point-of-load (POL) modules.
Abstract: Planar inductors made by mixed laminates of low-temperature sintered Ni-Cu-Zn ferrite tapes and metal-flake composite materials are used for high-density integration of point-of-load (POL) modules Incremental permeability and core loss density were characterized on toroidal samples under high dc bias to demonstrate that both materials are suitable for application in high-frequency high-current POL converters In order to realize a high power density POL module, a multilayer ferrite inductor laminated with alternating layers of ESL 40010 and ESL 40012 in a 1:1 ratio has been fabricated and integrated with the active layer Meanwhile, standard printed circuit board (PCB) processing has been adopted for the POL integration with a PCB-embedded inductor using NEC-TOKIN's metal-flake composite materials These developed 3-D integration approaches can be used to reduce the footprint and increase the power density for POL converters It has been demonstrated that the power efficiency of both POL modules with integrated planar inductors can achieve above 87% at an operating frequency of 2 MHz and an output current of 15 A Additionally, no obvious efficiency degradation was observed on the integrated POL modules after a certain number of thermal cycling from -40 °C to +150 °C
47 citations
Cites background from "Low Profile Integratable Inductor F..."
...demonstrated a low-profile ferrite inductor based on LTCC technology for power delivery applications [20], [21]....
[...]
TL;DR: In this paper, the authors proposed a hybrid integrated buck converter with a conductive shield layer to reduce trace inductance and improve circuit performance in the 20 A range, where a minimum shield thickness is required to minimize losses associated with ringing.
Abstract: Miniaturization of hybrid integrated buck converters is impeded by the difference in growth laws in current rating for silicon and for inductors as current rating increases. In the 20 A range, this leads to the attractive feasibility of planarizing the output inductor as the largest component by utilizing low-temperature cofired ceramic technology in the form of the (magnetic) substrate to carry the rest of the converter circuit. The presence of a magnetic substrate below the circuitry creates additional parasitic inductances, which results in low-frequency oscillations. From simulation, the presence of a conductive shield reduces trace inductances and improves circuit performance. There is a minimum shield thickness required to minimize losses associated with ringing. High-shield conductivity is necessary to lower the trace inductance and minimize power loss. Traces should be placed close to the shield to minimize inductance. Experimental results on converters with ceramic-based shield layers and organics-based shield layers bear out the theoretical expectations and establish the practical viability of the proposed hybrid integration technology.
43 citations
Cites background or methods from "Low Profile Integratable Inductor F..."
...The combination of the distributed air gap design, the geometry and the material leads to a sharp dependence of inductance on load current, with the light load inductance being much higher [20], [21]....
[...]
...It is evident from experimental results that the presence of an inductive substrate results in greater loop inductance, and hence, a poorly damped voltage oscillation across the devices, which can lead to operation when it is supposed to be turned OFF....
[...]
...together, pressed at elevated temperature using a hydraulic laboratory press and finally sintered [20], [22]....
[...]
...The effective inductance is measured using the ratio of the voltage across the inductor and the slew rate of the inductor current during the time when the top switch is OFF [20], [22]....
[...]
...The shield thickness printed in thick film technology with a conductive silver paste [20] is estimated to be around 50 μm, which is lower than...
[...]
16 May 2008
TL;DR: In this article, the use of Low- Temperature Co-fired Ceramic (LTCC) for integrating the inductor with the active stage of a non-isolated point of load (POL) converter was investigated.
Abstract: Thermal issues in the design of high-power and small-size non-isolated Point of Load (POL) converters have been significant and are becoming more so. If a heat sink is dispensed with, then a large area of multi-layer PCB material with significant amounts of copper is required for necessary cooling. A high-rate cooling fan is also necessary. So what at first seems like a small and elegant converter becomes bulky and challenging to position in the overall system when its thermal management is taken into account. This work finds a solution to these problems and investigates the use of Low- Temperature Co-fired Ceramic (LTCC) for integrating the inductor with the active stage. A buck POL is used to demonstrate these methodologies. The end result is a POL converter that can achieve full 20 A output current with no need for an external heat sink and no need for a cooling fan while providing a large step-down of 5 V to 1.2 V. High light- load efficiency of 92.2% is achieved and a high power density of 156 W/in3 including all the necessary thermal management, in natural convection condition, has been demonstrated.
43 citations
Cites methods from "Low Profile Integratable Inductor F..."
...The fabricated inductor uses LTCC ferrite tapes [ 8-12 ] serving as the core material, with the silver paste inductor winding embedded inside it. In addition, a metal shield using silver paste is integrated to shield the traces from the magnetic substrate, thereby reducing parasitic effects [13], [14]....
[...]
...As opposed to using the usual screen printing technique predominantly used in LTCC technology, a technique which is more suitable for making inductors which can support higher current is developed [10,11], following the initial work reported in [ 12 ]....
[...]
TL;DR: In this paper, the authors explored the structures, modeling, and fabrication of ultrathin coupled inductors based on low-temperature co-fired ceramic (LTCC) technology.
Abstract: It is found out that using reverse coupled inductors could effectively improve power density and dynamic performance of multiphase interleaved point of load converters. Thus, it is of great significance to conduct a research about design and fabrication of ultrathin coupled inductors for system 3-D integration. The aim of this paper is to explore the structures, modeling, and fabrication of ultrathin coupled inductors based on low-temperature cofired ceramic (LTCC) technology. Four structures classified by shapes and relative positions of windings are introduced and compared. Simple but effective analytic models are set up to calculate self-inductance, leakage inductance, and coupling coefficient for quick design, and a design guideline is summarized according to the models. We made a 1.3-mm-thick LTCC coupled inductor and two competing coil coupled inductors, and compared their characteristics and performance. They are tested in a 12-V input and 1.2-V/40-A output two-phase interleaved buck converter at three different switching frequencies. Core loss and winding loss of the inductors are quantified by simulation. Compared with conventional coil coupled inductors, the LTCC coupled inductor has higher power density and light load efficiency. Besides, it could also help to improve the transient performance of converters for its higher coupling coefficient.
40 citations
Cites background from "Low Profile Integratable Inductor F..."
...Recently, LTCC technology has been proposed to fabricate planar passives used in integrated high-frequency dc/dc converters [22]–[29]....
[...]
References
More filters
TL;DR: The micromachined on-chip inductors can be applied for magnetic microelectromechanical systems devices, such as micromotors, microactuators, microsensors, and integrated power converters, which envisages new micropower magnetics on a chip with integrated circuits.
Abstract: This paper describes three micromachined planar inductors (a spiral type, a solenoid type, and a toroidal meander type) with electroplated nickel-iron permalloy cores which have been realized on a silicon wafer using micromachining techniques. The electrical properties among the fabricated inductors are compared and the related fabrication issues are discussed, with emphasis on the low-temperature CMOS-compatible process, the high current-carrying capacity, the high magnetic flux density, the closed magnetic circuits, and the low product cost. The micromachined on-chip inductors can be applied for magnetic microelectromechanical systems devices, such as micromotors, microactuators, microsensors, and integrated power converters, which envisages new micropower magnetics on a chip with integrated circuits.
199 citations
23 Jun 1996
TL;DR: In this article, a design methodology based on a simple model is proposed for a 5 MHz buck power converter application is presented, and a power density of 12.8 W/cm/sup 2/ is achieved for an efficiency of 94%.
Abstract: Possible configurations for microfabricated inductors are considered. Inductance can be set by adjusting permeability through control of anisotropy of a permalloy core, or via a patterned quasi-distributed gap. A design methodology based on a simple model is proposed. Analysis of secondary effects is also developed. A design example for a 5 MHz buck power converter application is presented. A power density of 12.8 W/cm/sup 2/ is possible for an efficiency of 94%.
90 citations
10 Dec 2002
TL;DR: A dual spiral sandwiched thin film inductor with a dimension of 5 mm /spl times/ 5 mm was fabricated by a LIGA-like micromachined process as mentioned in this paper.
Abstract: A dual spiral sandwiched thin film inductor with a dimension of 5 mm /spl times/ 5 mm was fabricated by a LIGA-like micromachined process. FeBN magnetic films were used as a core material. The inductance and quality factor value of the inductor were measured approximately 1 /spl mu/H and 4 up to 5 MHz, respectively. Using the FeBN film inductor, a hybrid dc/dc converter (15 mm /spl times/ 12 mm /spl times/ 1.5 mm) was designed and fabricated. The circuit topology of the converter was a zero voltage switching clamp voltage (ZVS-CV) buck converter. An input of 3.6 V was bucked to 2.7 V at a switching frequency of 1.8 MHz. The maximum power was 1.5 W. The measured efficiency of the buck converter reached a maximum value of 80% and kept stable up to 300 mA of load currents at 1.8 MHz.
87 citations
"Low Profile Integratable Inductor F..." refers methods in this paper
...[10] fabricated a FeBN film inductor with a hybrid on-chip dc-dc converter with maximum power conversion of 1....
[...]
TL;DR: In this article, the complex permeability of anisotropic thin magnetic films over a continuous frequency spectrum has been measured using a low-level detection limit of about 1 mu m, an order of magnitude below the previously reported low level limit of 13 mu m.
Abstract: A permeameter is described that measures the complex permeability of anisotropic thin magnetic films over a continuous frequency spectrum. The system resolves the permeability into both real and imaginary parts, or magnitude and phase. The frequency span of the permeameters, 0.1-200 MHz, is larger than that of previously reported permeameters. The system has a measurement error of approximately 1%, which for the samples used here corresponds to a low-level permeance detection limit of about 1 mu m, an order of magnitude below the previously reported low level limit of 13 mu m. The system is both compact in size and convenient to use, with measurements taken over the whole frequency range in less than a minute. >
84 citations
"Low Profile Integratable Inductor F..." refers methods in this paper
...[24] reported on a swept frequency method which measures the complex permeability spectrum of anisotropic thin magnetic films....
[...]
TL;DR: In this paper, the authors present various ideas for integrating different components of dc-dc converter on to a silicon chip and compare trace resistance and inductance estimation of on-chip planar spiral inductor on top metal layer of CMOS process.
Abstract: This paper presents various ideas for integrating different components of dc-dc converter on to a silicon chip. These converters are intended to process power levels up to 0.5W. Techniques for integrating capacitors and design issues for MOS transistors are discussed. The most complicated design issue involves inductors. Expressions for trace resistance and inductance estimation of on-chip planar spiral inductor on top metal layer of CMOS process are compared. These inductors have high series resistance due to low metal trace thickness, capacitive coupling with substrate and other metal traces, and eddy current loss. As an alternative, a CMOS compatible three-dimensional (3-D) surface micromachining technology known as plastic deformation magnetic assembly (PDMA) is used to fabricate high quality inductors with small footprints. Experimental results from a monolithic buck converter using this PDMA inductor are presented. A major conclusion of this work is that the 3-D "post-process" technology is more viable than traditional integrated circuit assembly methods for realizing of micro-power converters.
78 citations
"Low Profile Integratable Inductor F..." refers background in this paper
...Planar integration of inductors on a silicon substrate has been a popular research area to realize a system-on-chip (SOC) solution [5]–[8]....
[...]
...high power density and decreased parasitics, which is brought about by physical proximity to the integrated circuit [8]....
[...]