Low voltage low power highly linear OTA using bulk driven technique
01 Dec 2015-pp 234-237
TL;DR: A new high performance OTA circuit using a bulk-driven differential input stage and a flipped-voltage follower current mirror is presented and provided a good linearity over the dynamic range, wide bandwidth and an excellent accuracy.
Abstract: A new high performance OTA circuit using a bulk-driven differential input stage and a flipped-voltage follower current mirror is presented. The proposed OTA is operated at low supply voltage of ± 0.4V with a reduced power consumption of 0.44mW. All simulations are performed by ELDO technology CMOS TSMC 90nm which is provided a good linearity over the dynamic range, wide bandwidth and an excellent accuracy.
Citations
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TL;DR: A new high performance OTA circuit using source degeneration technique and a flipped-voltage follower current mirror is presented to improve the bias current of the input differential pair when large signals are applied, thus, increasing circuit dynamic characteristics.
Abstract: A new high performance OTA circuit using source degeneration technique and a flipped-voltage follower current mirror is presented. Source-degeneration techniques improve the bias current of the input differential pair when large signals are applied, thus, increasing circuit dynamic characteristics. The OTA is implemented in Tower Jazz 0.18µm TS18SL technology under a ± 0.9V supply voltage. Simulation results show that the OTA achieves a wide differential input range, a good Gm tenability and a low power consumption of 1.2µW. A first order Gm-C filter based on the proposed OTA is designed and simulation results are presented and commented.
12 citations
Cites methods from "Low voltage low power highly linear..."
...For this reason, several techniques have been proposed in the litterateur to improve the linearity performance of MOS transconductor, such as: crossing-coupling of multiple differential pair [7], adaptive biasing [8], source degeneration using resistors or MOS transistors [9,10], Bulk driven [11] constant drain-source voltages [12], super class-AB linear operation [13], and signal attenuation [14]....
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TL;DR: A brief survey of various popular linearization techniques reported in the past to linearize the OTA viz source degeneration, square root technique and mobility compensation is provided.
Abstract:
Operational Transconductance Amplifier (OTA) plays an essential role
in many analog and mixed-signal applications that encourages the researchers to contribute their
work to design suitable structures of OTA for their applications with acceptable performance
parameters.
The linearity of an OTA is one of its key performance parameters, which affects the performance
of the overall system whereas the transconductance value of OTA (Gm) contributes to decide
its application area. Low transconductance OTA finds its application in biomedical and neural
networks while OTA with higher transconductance is suitable for wireless communication. In any
system, it is desirable to obtain a linear voltage-to-current conversion, i.e., OTA, hence various linearization
techniques have been reported to linearize the OTA.
In the last two decades, various OTA structures have been reported with linear voltage-tocurrent
conversion. Some researchers used attenuation by means of different circuit approaches to
linearize the OTA or some used cancellation of nonlinearity terms by using different circuit implementation
techniques. Researchers used some other methods also to linearize the OTA viz
source degeneration, square root technique and mobility compensation.
The purpose of this paper is to provide a brief survey of various popular linearization
techniques reported in the past.
13 Oct 2020
TL;DR: In this paper, the effect of scaling down to 28nm (bulk and planar) is studied on a specific Ultra-Low Voltage/Power (ULV/P) OTA design.
Abstract: In this paper, the effect on the performances of the technology scaling down to 28nm (bulk and planar) is studied on a specific Ultra-Low Voltage/Power (ULV/P) OTA [4] design. This study is carried out for 90nm and 28nm technology node OTA using specifically the shortest available channel length and benchmarked with the original OTA in 180nm. First, the TCAD simulation (Synopsys) of the design implemented with the corresponding iPDK’s are performed and the electrical parameters are extracted. We deduced that the short channel devices still conserve a good dc gain explained by physics considerations. Then, the performance analysis based on the power consumption and Figure-Of-Merit leads to conclude that alike the large signal performance, the small signal performance is maintained with a significant power dissipation reduction making the 28nm technology still an interesting choice for small-signal applications. However, a specific study of the variability (process variation) of the transistor performance shows that OTA implemented in 28nm node may provide a poor fabrication yield suggesting to consider ULV/P OTA design immune to the variability introduced by low technology node.
Cites methods from "Low voltage low power highly linear..."
...summarized in the Table II along with the data obtained from the literature [9]-[12] considering different strategies as Bulk Driven and similar techniques....
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References
More filters
TL;DR: In this paper, the authors present a 1-V analog op-amp with rail-to-rail input and output ranges, which achieves 1.3 MHz unity gain and 57/spl deg/ phase margin for a 22pF load capacitance.
Abstract: This paper addresses the difficulty of designing 1-V capable analog circuits in standard digital complementary metal-oxide-semiconductor (CMOS) technology, Design techniques for facilitating 1-V operation are discussed and 1-V analog building block circuits are presented. Most of these circuits use the bulk-driving technique to circumvent the metal-oxide-semiconductor field-effect transistor turn-on (threshold) voltage requirement. Finally, techniques are combined within a 1-V CMOS operational amplifier with rail-to-rail input and output ranges. While consuming 300 /spl mu/W, the 1-V rail-to-rail CMOS op amp achieves 1.3-MHz unity-gain frequency and 57/spl deg/ phase margin for a 22-pF load capacitance.
408 citations
"Low voltage low power highly linear..." refers methods in this paper
...Firstly, it is used to increase respectively the input common mode voltage range [16], because the Bulk Driven transistor is a depletion type device, it can work under negative, zero, or even slightly positive biasing condition....
[...]
TL;DR: In this paper, two transconductance amplifiers are presented in which the concept of an input dependent bias current has been introduced, and the amplifiers combine a very low standby power dissipation with a high driving capability.
Abstract: Two transconductance amplifiers are presented in which the concept of an input dependent bias current has been introduced. As a result, these amplifiers combine a very low standby power dissipation with a high driving capability. The first amplifier, suited for SC filters, is fairly small (0.075 mm/SUP 2/) and has a slew rate which is more than an order of magnitude better than micropower amplifiers presented earlier. The second amplifier can be used as a micropower buffer. Nearly the whole supply current is used to charge the load capacitor so that this amplifier has a high efficiency.
284 citations
"Low voltage low power highly linear..." refers methods in this paper
...To solve this problem, several circuit techniques, crossingcoupling of multiple differential pair [3], adaptive biasing [5], source degeneration using resistors or MOS transistors [7] constant drain-source voltages [10] and super class-AB linear operation [12] can be used....
[...]
TL;DR: In this article, a new configuration for linear MOS voltage-to-current conversion (transconductance) was proposed, which combines two previously reported linearization methods, achieving 60-dB linearity for a fully balanced input dynamic range up to 1 V/sub pp/ at a 3.3-V supply voltage, with slightly decreasing performance in the unbalanced case.
Abstract: This paper presents a new configuration for linear MOS voltage-to-current conversion (transconductance). The proposed circuit combines two previously reported linearization methods. The topology achieves 60-dB linearity for a fully balanced input dynamic range up to 1 V/sub pp/ at a 3.3-V supply voltage, with slightly decreasing performance in the unbalanced case. The linearity is preserved during the tuning process for a moderate range of transconductance values. The approach is validated by both computer simulations and experiments.
160 citations
"Low voltage low power highly linear..." refers methods in this paper
...To solve this problem, several circuit techniques, crossingcoupling of multiple differential pair [3], adaptive biasing [5], source degeneration using resistors or MOS transistors [7] constant drain-source voltages [10] and super class-AB linear operation [12] can be used....
[...]
TL;DR: A frequency-dependent harmonic-distortion analytical method is presented applied to a linear-enhanced OTA, which is suitable for high-frequency operation and uses three linearization techniques simultaneously: attenuation through floating-gate MOS transistors; 2) source degeneration; and 3) polynomial cancellation techniques.
Abstract: Recent progress of wide-band communication systems demands high-frequency circuits. Conventionally, the linearity of the operational transconductance amplifier and capacitor (OTA-C) has been analyzed using Taylor series expansion. Unfortunately, this approach does not predict the frequency-dependent linearity degradation. Thus, to properly design linearized OTAs, the frequency dependence of these coefficients must be determined. In this paper, we present a frequency-dependent harmonic-distortion analytical method applied to a linear-enhanced OTA. This OTA, which is suitable for high-frequency operation, uses three linearization techniques simultaneously: 1) attenuation through floating-gate MOS transistors; 2) source degeneration; and 3) polynomial cancellation techniques. By using the harmonic-distortion analysis, some properties on the performance of OTA are used to improve the performance of OTA-C based circuits at high frequencies. A 0.5-mum CMOS OTA simulation and experimental results are shown to verify the harmonic-distortion analytical method
86 citations
"Low voltage low power highly linear..." refers methods in this paper
...To solve this problem, several circuit techniques, crossingcoupling of multiple differential pair [3], adaptive biasing [5], source degeneration using resistors or MOS transistors [7] constant drain-source voltages [10] and super class-AB linear operation [12] can be used....
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23 May 2005
TL;DR: This paper explores and presents the possible approaches to the design of a low-voltage operational transconductance amplifier (OTA) using the bulk-driven technique and designs a fully differential folded-cascode OTA using a 0.35 /spl mu/m CMOS technology.
Abstract: This paper explores and presents the possible approaches to the design of a low-voltage operational transconductance amplifier (OTA) using the bulk-driven technique. The design of a 0.8 V fully differential folded-cascode OTA using a 0.35 /spl mu/m CMOS technology having a threshold voltage of 0.6 V is presented. This OTA utilizes bulk-driven differential-pairs to achieve rail-to-rail input operation, and gate- and bulk-biased cascode transistors to increase the output resistance. A continuous-time common-mode feedback (CMFB) is used for this OTA, which implements the bulk-driven differential pairs to sense the common-mode voltage smaller than the transistor's threshold voltage, as well as bulk-driven current mirrors to reduce voltage headroom consumption. This OTA has been designed using Alcatel's 0.35 /spl mu/m twin-well CMOS technology, and the simulation results indicate an open-loop gain>60 dB, unity gain-bandwidth=3.4 MHz with a 5 pF load, and an input common mode range (ICMR) of 0.8 V.
78 citations