Journal ArticleDOI
Machine learning method to predict threshold voltage distribution by read disturbance in 3D NAND Flash Memories
Reads0
Chats0
About:
This article is published in Japanese Journal of Applied Physics.The article was published on 2020-07-31. It has received 7 citations till now. The article focuses on the topics: Flash (photography) & NAND gate.read more
Citations
More filters
Journal ArticleDOI
Machine learning model for predicting threshold voltage by taper angle variation and word line position in 3D NAND Flash memory
Journal ArticleDOI
Investigation of Poly Silicon Channel Variation in Vertical 3D NAND Flash Memory
TL;DR: In this paper , the curvature of the channel was defined as a wave factor (WF) parameter, and simulated 3D NAND device with the WF applied channel was investigated, which showed that degradation of erase characteristic by WF can be prevented by applying thicker blocking oxide.
Journal ArticleDOI
Enhancement of ISPP Efficiency Using Neural Network-Based Optimization of 3-D NAND Cell
TL;DR: In this article , a neural network (NN)-applied optimization method was proposed to improve program efficiency for fast NAND cell operation by predicting the threshold voltages of the 21 states of a single NAND flash memory within a second.
Journal ArticleDOI
Transient program operation model considering distribution of electrons in 3D NAND flash memories
Dong Chan Lee,Hyungcheol Shin +1 more
TL;DR: A modified 1-D Poisson equation was proposed that shows better accuracy than the existing model by reflecting the spatial distribution of electrons trapped by the program operation of 3D NAND Flash memories.
Journal ArticleDOI
Super-steep synapses based on positive feedback devices for reliable binary neural networks
Dongseok Kwon,Hyeongsu Kim,Kyu Ho Lee,Joon Hwang,Wonjun Shin,Jong-Ho Bae,Sung Yun Woo,Jong-Ho Lee +7 more
TL;DR: In this paper , a positive feedback (PF) device-based synaptic devices for reliable binary neural networks (BNNs) is proposed, which has a charge-trap layer by which the turn-on voltage ( Von) of the device can be adjusted by program/erase operations.
References
More filters
Journal ArticleDOI
Array Architectures for 3-D NAND Flash Memories
TL;DR: 3-D NAND Flash memories and the related integration challenges are discussed with the aid of several bird’s-eye views, and future scaling trends will be presented.
Journal ArticleDOI
Machine Learning Approach for Predicting the Effect of Statistical Variability in Si Junctionless Nanowire Transistors
TL;DR: In this paper, a hierarchical multi-scale simulation study of a silicon junctionless nanowire field effect transistor (JL-NWT) with a gate length of 150 nm and diameter of an Si channel of 8 nm is presented.
Journal ArticleDOI
Physics-Inspired Neural Networks for Efficient Device Compact Modeling
TL;DR: A novel physics-inspired neural network (Pi-NN) approach for compact modeling, which incorporates fundamental device physics, and shows new light on the future of the neural network compact modeling.
Journal ArticleDOI
A high throughput molecular screening for organic electronics via machine learning: present status and perspective
TL;DR: Although the complexity of OFET, OLED, and OPV makes revealing their structure-property relationships difficult, a cooperative approach incorporating virtual ML, human consideration, and fast experimental screening may help to navigate growth and development in the organic electronics field.
Journal ArticleDOI
Prediction of Process Variation Effect for Ultrascaled GAA Vertical FET Devices Using a Machine Learning Approach
TL;DR: An accurate and efficient machine learning (ML) approach which predicts variations in key electrical parameters using process variations (PVs) from ultrascaled gate-all-around (GAA) vertical FET (VFET) devices with the same degree of accuracy, as well as improved efficiency compared to a 3-D stochastic TCAD simulation.