Patent
Method of forming a polysilicon diode and devices incorporating such diode
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TLDR
In this article, a diode is formed in a container in an insulative structure layered on a substrate of an integrated circuit, and the container is then partially filled with a polysilicon material, by methods such as conformal deposition, leaving a generally vertical seam in the middle of the material.Abstract:
A method for manufacturing a diode having a relatively improved on-off ratio. The diode is formed in a container in an insulative structure layered on a substrate of an integrated circuit. The container is then partially filled with a polysilicon material, by methods such as conformal deposition, leaving a generally vertical seam in the middle of the polysilicon material. An insulative material is deposited in the seam. The polysilicon material is appropriately doped and electrical contacts and conductors are added as required. The diode can be coupled to a chalcogenide resistive element to create a chalcogenide memory cell.read more
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Patent
Resistance change memory device
Haruki Toda,Koichi Kubo +1 more
TL;DR: A resistance change memory device as discussed by the authors is a memory cell array with memory cells arranged therein, the memory cell having a variable resistance element for storing a rewritable resistance value; a reference cell formed of the same memory cells as those set in a high resistance state in the array, the reference cell being trimmed with selection of the number of parallel-connected memory cells to have a reference current value used for detecting data in the memory cells array.
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Method for forming phase-change memory bipolar array utilizing a single shallow trench isolation for creating an individual active area region for two memory array elements and one bipolar base contact
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Reduced area intersection between electrode and programming element
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References
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Patent
Programmable cell for use in programmable electronic arrays
TL;DR: An improved programmable cell for use in programmable electronic arrays such as PROM devices, logic arrays, gate arrays and die interconnect arrays is presented in this paper, where the cells have a highly nonconductive state settable and non-resettable into a highly conductive state.
Patent
Electrically erasable, directly overwritable, multibit single cell memory elements and arrays fabricated therefrom
TL;DR: In this paper, an electrically operated memory element (30) includes a volume of memory material (36) characterized by: a large dynamic range of electrical resistance values; and the ability of at least a filamentary portion to be set, by the selected electrical signal to any resistance value in the dynamic range, regardless of the previous resistance value of the material so as to provide a single cell with multibit storage capabilities.
Patent
Electrically erasable phase change memory
TL;DR: In this article, an electrically erasable phase change memory utilizing a stoichiometrically balanced phase change material was proposed, in which both the switching times and the switching energies required for the transitions between the amorphous and the crystalline states were substantially reduced below those attainable with prior state-of-the-art phase change memories.
Patent
Multibit single cell memory element having tapered contact
TL;DR: In this paper, an electrically operated, directly overwritable, multibit, single-cell chalcogenide memory element with multi-bit storage capabilities and having at least one contact for supplying electrical input signals to set the memory element to a selected resistance value was presented.
Patent
Chalcogenide memory cell with a plurality of chalcogenide electrodes
TL;DR: In this article, a chalcogenide memory cell is presented, which includes a dielectric layer with an opening defining a pore, and a volume of chalgogenide material formed integral to the upper chalkogenide electrode contained within the pore.