Microelectromechanical reprogrammable logic device.

TL;DR: A reprogrammable logic device based on the electrothermal frequency modulation scheme of a single microelectromechanical resonator, capable of performing all the fundamental 2- bit logic functions as well as n-bit logic operations, and promises an alternative electromechanical computing scheme.

Abstract: In modern computing, the Boolean logic operations are set by interconnect schemes between the transistors. As the miniaturization in the component level to enhance the computational power is rapidly approaching physical limits, alternative computing methods are vigorously pursued. One of the desired aspects in the future computing approaches is the provision for hardware reconfigurability at run time to allow enhanced functionality. Here we demonstrate a reprogrammable logic device based on the electrothermal frequency modulation scheme of a single microelectromechanical resonator, capable of performing all the fundamental 2-bit logic functions as well as n-bit logic operations. Logic functions are performed by actively tuning the linear resonance frequency of the resonator operated at room temperature and under modest vacuum conditions, reprogrammable by the a.c.-driving frequency. The device is fabricated using complementary metal oxide semiconductor compatible mass fabrication process, suitable for on-chip integration, and promises an alternative electromechanical computing scheme.

Full text

ARTICLE
Received 30 Nov 2015
| Accepted 24 Feb 2016 | Published 29 Mar 2016
Microelectromechanical reprogrammable logic
device
M.A.A. Hafiz
1
, L. Kosuru
1
& M.I. Younis
1
In modern computing, the Boolean logic operations are set by interconnect schemes between
the transistors. As the miniaturization in the component level to enhance the computational
power is rapidly approaching physical limits, alternative computing methods are vigorously
pursued. One of the desired aspects in the future computing approaches is the provision for
hardware reconfigurability at run time to allow enhanced functionality. Here we demonstrate
a reprogrammable logic device based on the electrothermal frequency modulation scheme of
a single microelectromechanical resonator, capable of performing all the fundamental 2-bit
logic functions as well as n-bit logic operations. Logic functions are performed by actively
tuning the linear resonance frequency of the resonator operated at room temperature and
under modest vacuum conditions, reprogrammable by the a.c.-driving frequency. The device
is fabricated using complementary metal oxide semiconductor compatible mass fabrication
process, suitable for on-chip integration, and promises an alternative electromechanical
computing scheme.
DOI: 10.1038/ncomms11137
OPEN
1
Physical Sciences and Engineering Division, King Abdullah University of Science and Technology, Thuwal 23955-6900, Saudi Arabia. Correspondence and
requests for materials should be addressed to M.I.Y. (email: mohammad.younis@kaust.edu.sa).
NATURE COMMUNICATIONS | 7:11137 | DOI: 10.1038/ncomms11137 | www.nature.com/naturecommunications 1

T
he quest for mechanical computation is a century old and
can be traced back to at least 1822 when Babbage presented
his concept of difference engine
1
. Although the interest
remained within the research community, the subsequent
development in the fields of electronic transistor
2
and magnetic
storage
3,4
outperformed the mechanical approach in computation
both in terms of speed of operation and data density.
However, recent advancements in micro-/nano-fabrication and
measurement techniques have renewed the interest in the field of
mechanical computation in the last decade
5–21
.
The key to any computing machine are logic elements. The first
demonstrated dynamic mechanical XOR logic gate was based on
a piezoelectric nanoelectromechanical system (NEMS) structure
where the presence (absence) of high-amplitude vibration in the
linear regime denotes a logical high (low) state
7
. Later, OR/NOR
and AND/NAND logic gates have been demonstrated utilizing
the bistability of a nonlinearly resonating NEMS resonator
mediated by the noise floor
12
. A universal logic device capable of
performing AND, OR and XOR logic gates as well as multibit
logic circuits has been implemented by parametrically exciting a
single electromechanical resonator
15
. Same research group also
demonstrated XOR and OR logic gates in an electromechanical
membrane resonator under high vacuum and at room
temperature condition
16
. On the basis of feedback control, a
memory and OR logic operation have been demonstrated on a
single microelectromechanical system (MEMS) resonator
working in the nonlinear regime
20
. Recently, an unconventional
and reversible logic gate (Fredkin gate) has been presented based
on four coupled linearly resonating NEMS resonators
21
where
AND, OR, NOT and FANOUT gate operations have been
demonstrated. Note that room temperature and atmospheric
operations are desirable prerequisites for any practical device
implementation.
Here we demonstrate a reprogrammable logic device, capable
of performing 2-bit AND, NAND, OR, NOR, XOR, XNOR and
NOT logic operations using a single microelectromechanical
resonator operating in the linear regime. The logic operations are
performed by electrothermal modulation of the linear resonance
frequency of the resonator, where two separate d.c. voltage
sources represent logic inputs. The device can be programmed to
perform any of these logic operations by simply tuning the
a.c.-driving frequency. Also, we use this scheme of electrothermal
frequency tuning to demonstrate 3-bit AND, NAND, OR and
NOR logic gates on a single MEMS resonator. This can be
extended to n-bit logic operations by adding a single d.c. voltage
source per bit. This device works under room temperature and
modest vacuum conditions and is fabricated using standard
complementary metal oxide semiconductor-based fabrication
techniques suitable for mass fabrication and on-chip integrated
system development.
Results
Device fabrication and experimental set-up. The resonator is
fabricated on a highly conductive Si device layer of silicon on
insulator wafer by a two-mask process using standard photo-
lithography, electron beam evaporation for metal layer deposition
for actuating pad, deep reactive ion etch for silicon device layer
etching and vapour hydrofluoric acid etch to remove the oxide
layer underneath the resonating structure. It consists of a
clamped–clamped arch-shaped microbeam with two adjacent
electrodes to electrostatically induce the vibration and detect the
generated a.c. output current due to the in-plane motion of the
microbeam. The dimensions of the curved beam are 500 mmin
length, 3 mm in width and 30 mm in thickness. The gap between
the actuating electrode and the resonating beam is 8 mm at the
fixed anchors and 11 mm at the midpoint of the microbeam due to
its 3-mm initial curvature.
Figure 1a shows the schematic of the arch microbeam and the
two-port electrical transmission measurement configuration for
electrostatic actuation and sensing that includes the parasitic
current compensation circuit for enhanced transmission signal
measurements
22
. The drive electrode is provided with an a.c.
actuation signal from one of the outputs of a single-to-differential
driver (AD8131), and the beam electrode is biased with a d.c.
voltage source. The output current induced at the sense electrode
is coupled with the variable compensation capacitor, C
comp
, and
followed by a low-noise amplifier whose output is coupled to the
network analyser input port. Two logic inputs are provided with
two d.c. voltage sources, V
A
and V
B
, connected in parallel across
the microbeam with series resistors, R
A
and R
B
, and switches,
A and B, respectively. The electrical wiring scheme for the logic
inputs is depicted in red to differentiate it from the rest of the
electrical connections. The binary logic input 1(0) is represented
by connecting (disconnecting) V
A
and V
B
from the electrical
network by the two switches, A and B, respectively. Hereafter,
switch ON (OFF) condition for switches A and B corresponds to
AD8131
Agilent E5071C
network analyzer
C
comp
OutIn
Beam
electrode
LNA
V
B
R
B
B
0
1
AV
A
R
A
Drive electrode
Sense electrode
Y
X
+–
+–
l
T
l
T
l
T
V
d.c.
Bias
a
b
Figure 1 | Clamped–clamped arch resonator. (a) Schematic of the arch
beam resonator and the two-port electrical transmission measurement
configuration together with a parasitic current compensation circuitry using
single-to-differential driver (AD8131) and a variable compensation
capacitor, C
comp
. The drive electrode is provided with an a.c. signal from one
of the outputs from AD8131 and the beam electrode is biased with a d.c.
voltage source. The output current induced at the sense-electrode is
coupled with the compensation capacitor and followed by a low-noise
amplifier (LNA) whose output is coupled to the network analyser input port.
Two voltage sources, V
A
and V
B
and switches, A and B are connected in
parallel across the beam to perform logic operations by electrothermal
tuning of the resonance frequency. The arrow in the red represents the
current flowing through the beam, responsible for electrothermal frequency
modulation. (b) An SEM image of the microbeam resonator. Scale bar,
200 mm.
ARTICLE NATURE COMMUNICATIONS | DOI: 10.1038/ncomms11137
2 NATURE COMMUNICATIONS | 7:11137 | DOI: 10.1038/ncomms11137 | www.nature.com/naturecommunications

the binary logic input 1(0). The sensing electrode is used to obtain
the logic output, where a relative high (low) S
21
transmission
signal corresponds to the logic output 1(0). Figure 1b shows an
SEM image of the arch microbeam resonator.
Electrothermal frequency modulation. Electrothermal frequency
modulation has an essential role in the execution of the logic
functions in this architecture. Figure 2 shows four different
electrical circuit configurations between nodes X and Y, shown in
Fig. 1a. All the four logic input conditions, (0,0), (0,1), (1,0) and
(1,1) are shown in Fig. 2a–d, respectively. For the case of (0,0)
logic input condition, the total current flowing through the
microbeam is I
T
¼ 0 as depicted in the electrical circuit in Fig. 2a.
In this case, the resonator exhibits series resonance peak
and parallel resonance dip (anti-resonance) at 117.663 and
117.361 kHz, respectively, with an a.c. actuation voltage of 2 dBm
(0.28 V
rms
) and V
d.c.
of 45 V at 1 torr pressure and at room
temperature (see Supplementary Note 1 and Supplementary
Fig. 1a,b). The corresponding frequency response is plotted in
black in Fig. 3. Note that due to over compensation of the feed
through by the parallel variable compensation capacitance, C
comp
,
the parallel resonance appears earlier than the series resonance
22
.
However, this does not put any limitation on the successful logic
operation by the device. Moreover, we use both the series and
parallel resonances for implementing the logic gates. For logic
input (0,1) or (1,0) conditions, either V
B
or V
A
is connected to
the microbeam as depicted in the electrical circuits shown in
Fig. 2b,c, respectively. Hence, the total current that flows through
the microbeam is either I
T
¼ I
B
or I
T
¼ I
A
. We chose V
A
¼ 0.4 V,
V
B
¼ 0.7 V, and R
A
¼ R
B
¼ 50 O so that it satisfies the condition of
the same current amount at each case; I
A
¼ I
B
. Note that we
measured the microbeam resistance R
MB
¼ 114 O. The electrical
current flowing through the microbeam generates heat and causes
thermal expansion, which induces compressive axial force.
This compressive force causes an increase in the microbeam
curvature
23–25
and increases its stiffness. Hence, the series
resonance frequency increases to 121.431 kHz for either (0,1) or
(1,0) logic input conditions. The frequency responses due to the
logic input (0,1) and (1,0) conditions are plotted as red and blue,
respectively, in Fig. 3. For logic input condition (1,1), both the
voltage sources V
A
and V
B
are connected to the microbeam as
depicted in the electrical circuit shown in Fig. 2d. The total
current generated in this case is I
T
¼ I
0
A
þ I
0
B
4I
A
or I
B
. Hence,
the series resonance frequency further increases to 128.969 kHz as
depicted in green in Fig. 3. Thus, one can modulate the resonance
frequencies (series and parallel) of the microbeam through the
electrothermal effect by controlling the amount of current flow in
the microbeam. Towards this, we build different logic gates by
properly choosing the a.c.-driving frequency. We identify three
regions in the frequency response plot of Fig. 3 to build all the six
logic gates. Region I corresponds to frequency of operation
for logic gates OR/NOR, region II corresponds to logic gates
XOR/XNOR and finally, region III corresponds to logic gates
AND/NAND. NOT logic operation can be built on any of these
frequencies by proper conditioning of one of the inputs. The
detail execution of the logic gates will be discussed in the
following sections.
NOR/OR. The frequency responses of the resonator for different
logic input conditions are shown in Fig. 4a, which lies in the
region I of Fig. 3. To demonstrate NOR gate operation, the fre-
quency of 117.663 kHz is chosen as it shows high S
21
transmission
signal denoted as the logic output 1 (in black) for (0,0) logic input
V
A
V
A
R
A
A
B
0
0
A
B
01
l
T
= 0
l
T
= l
B
R
B
R
A
R
B
R
MB
R
MB
V
B
V
B
X
Y
X
Y
+
+
–
–
V
A
R
A
A
B
10
l
T
= l
A
R
B
R
MB
V
B
X
Y
+
–
+
+
–
–
++
+
–
V
A
R
A
A
B1
1
l
T
= l ′
A
+l ′
B
R
B
R
MB
V
B
X
Y
–
–
ab
cd
Figure 2 | Electrical circuit configuration of the logic input conditions.
(a) The electrical circuit represents the (0,0) logic input condition where
the total current I
T
through the beam R
MB
is zero. (b) The circuit represents
the (0,1) logic input condition corresponds to switch A, OFF and switch B,
ON where the total current I
T
flowing through the beam R
MB
is I
B
.
(c) The circuit represents the (1,0) logic input condition corresponds to
switch A, ON and switch B, OFF where the total current I
T
flowing through
the beam R
MB
is I
A
.(d) The circuit represents the (1,1) logic input condition
corresponds to switch A, ON and switch B, ON where the total current I
T
flowing through the beam R
MB
is I
0
A
þ I
0
B
.
0 0
AB
01
AB
10
AB
11
–56.0
–58.8
–61.6
S
21
(dB)
A B
Region 1
Region 2
Region 3
110 135
130125120
115
110 135130125120
115
110
135
130125120
115
110
135
130125
120115
S
21
(dB)
S
21
(dB)
–57.8
–61.2
–64.6
–57.6
–60.8
–64.0
S
21
(dB)
–58.8
–61.6
–64.4
Frequency (kHz)
Figure 3 | Electrothermal frequency modulation. Frequency responses of
the resonator for different logic input conditions, (0,0), (0,1), (1,0) and (1,1),
shown in black, red, blue and green, respectively.
NATURE COMMUNICATIONS | DOI: 10.1038/ncomms11137 ARTICLE
NATURE COMMUNICATIONS | 7:11137 | DOI: 10.1038/ncomms11 137 | www.nature.com/naturecommunications 3

condition only. The resonator is tuned away from its series
resonance frequency of 117.663 kHz by other logic input condi-
tions, (0,1), (1,0) and (1,1), respectively. Hence, shows low S
21
transmission signal denoted as logic output 0 (in black) at the
frequency of 117.663 kHz. The NOR gate truth table is shown in
the inset of Fig. 4a. The time response of the resonator showing
binary inputs A and B and the corresponding logic output is
depicted in Fig. 4b. It clearly shows NOR logic operation as the
AB
001
010
10
0
11
0
0
A
1
0
1
0
1
B
0
'1'
'0'
ABOR
000
011
101
111
0
A
B
0
0
1
1
1
0
–58
S
21
(dB)
S
21
(dB)
–59
–60
–61
117.663 kHz
'1'
NOR
'0'
117.6 118.2 118.8 119.4 120.0
Frequency (kHz)
Switch
ON
OFF
ON
OFF
ON
OFF
ON
OFF
S
21
(dB)
–58.5
–60.0
–61.5
NOR
–63.0
60504030
20
10
Time (s)
Logic inputsLogic output
Logic inputs
Logic output
–60.9
–61.6
–62.3
–63.0
117.361 kHz
Frequency (kHz)
117.0115.0 115.5 116.0 116.5
Switch
OR
S
21
(dB)
–62
–63
–64
Time (s)
605040302010
ab
cd
Figure 4 | Demonstration of 2-bit NOR and OR logic gates. (a) Frequency responses of the resonator for different logic input conditions where (0,0) logic
input condition, shown in black has high S
21
transmission signal at 117.663 kHz and others have low S
21
transmission signal represented by 1 and 0,
respectively. Truth table of NOR logic output is shown in the inset. (b) Demonstration of NOR logic operation when the frequency of the a.c. input signal is
chosen as 117.663 kHz. Two input signals A and B are shown in black and red, respectively, where the switch OFF/ON corresponds to 0/1 logic input
conditions. The S
21
transmission signal in blue corresponds to the logic output and fulfills the NOR truth table. ( c ) Frequency responses of the resonator for
different logic input conditions, where (0,0) logic input condition shown in black has low S
21
transmission signal at 117.361 kHz and others have high S
21
transmission signal, represented by 0 and 1, respectively. Truth table for OR logic output shown in the inset. (d) Demonstration of OR logic operation when
the a.c. input signal frequency is chosen as 117.361 kHz. Two input signals, A and B are shown in black and red, respectively, and the switch OFF/ON
corresponds to 0/1 logic input conditions. The S
21
transmission signal in blue corresponds to the logic output that fulfills the OR truth table.
A B NOT
00 1
10 0
0
1
A
0
0
0
1
1
B
S
21
(dB)
–58
–59
–60
–61
Frequency (kHz)
120.0
119.4
118.8118.2
117.6
'0'
'1'
117.663 kHz
Switch
ON
OFF
ON
OFF
S
21
(dB)
–60
–61
–62
–63
Time (s)
605040302010
NOT
Logic output
Logic inputs
ab
Figure 5 | Demonstration of NOT gate. (a) Frequency responses of the resonator for different logic input conditions, where (0,0) logic input
condition shown in black has high S
21
transmission signal at 117.663 kHz and others have low S
21
transmission signal represented by 1 and 0, respectively.
Truth table of NOT logic gate is shown in the inset. (b) Demonstration of NOT logic operation when the frequency of the a.c. input signal is chosen as
117.663 kHz. Two input signals, A and B are shown in black and red, respectively, where the switch OFF/ON corresponds to 0/1 logic input conditions.
S
21
transmission signal in blue corresponds to the logic output and fulfills the NOT truth table.
ARTICLE NATURE COMMUNICATIONS | DOI: 10.1038/ncomms11137
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output is 1 (high) only when both the inputs A and B are 0
(switch OFF), and the output is 0 (low) for all the other condi-
tions, (0,1), (1,0) and (1,1).
To demonstrate OR logic gate, we exploit the parallel
resonance dip at 117.361 kHz, shown in black circle in Fig. 4c.
Here the low level of S
21
transmission signal is considered as the
logic output 0 (in green), and otherwise as the logic output 1
(in green). The OR gate truth table is shown in the inset of Fig. 4c.
Figure 4d shows the time response of the resonator output for OR
logic gate operation with the corresponding binary inputs A and
B. It clearly shows OR logic operation as the logic output is
0 (low) when both the inputs A and B are 0, and logic output is
1 (high) for all the other conditions.
NOT. To perform NOT operation on the input A, the a.c.-driving
frequency is set to be at 117.663 kHz and the input B is set to
0 (switch OFF). For this set condition, a high S
21
transmission
signal (logic output 1) is achieved for the logic input A set at
0 (switch OFF) and vice versa as shown in Fig. 5a. We note that
NOT operation can also be built on input B by properly setting
input A (switch OFF/ON) and a.c.-driving frequency. The time
response for the NOT operation is shown in Fig. 5b. It is evident
from the output signal that when the input A is 0, the output is 1
and vice versa.
XOR/XNOR. Frequency responses of the resonator for different
logic input conditions are shown in Fig. 6a, which lies in the
region II of Fig. 3. To implement XOR gate, the frequency of
operation is chosen as 121.431 kHz, shown in black circle in
Fig. 6a. At this operating frequency, it shows low S
21
transmission
signal denoted as the logic output 0 (in black) for the logic input
conditions (0,0) and (1,1). For other logic input conditions, (0,1)
and (1,0), it shows high S
21
transmission signal denoted as the
logic output 1 (in black). The truth table for XOR logic gate is
shown in the inset of Fig. 6a. Figure 6b shows the time response
of the resonator output for XOR logic gate operation with the
corresponding binary inputs A and B. It clearly shows XOR logic
gate operation as the logic output is 1 (high) when the inputs A
and B are complementary to each other. On the other hand, the
logic output is 0 (low) for the same logic input conditions, (0,0)
and (1,1).
To demonstrate XNOR logic gate, we exploit the parallel
resonance dip at 121.281 kHz, shown in black circle in Fig. 6c.
Here the low level of S
21
transmission signal is considered as the
logic output 0 (in green), and otherwise as the logic output 1
(in green). XNOR truth table is shown in the inset of Fig. 6c.
Figure 6d shows the time response of XNOR logic gate output
and the corresponding binary logic inputs A and B. It clearly
shows XNOR logic gate operation as the logic output is 1 (high)
when both the inputs A and B are same, (0,0) and (1,1), and
otherwise the logic output is 0 (low). Note that occasional spikes
observed in the S
21
transmission signal (in blue) in Fig. 6b,d are
due to the switching between (0,1) and (1,0) logic input
conditions. However, the resonator still performs the desired
logic operations successfully.
A
B
1
1
1
0
0
0
AB
00
1
010
100
111
A
B
Switch
ON
OFF
ON
OFF
Logic inputsLogic output
1
1
1
0
0
0
Logic inputsLogic output
S
21
(dB)
–64
–62
–60
–58
Switch
ON
OFF
ON
OFF
S
21
(dB)
–65
–64
–63
–62
Time (s)
10020304050
60
0
Time (s)
10 20 30 40 50
60
XNOR
XOR
S
21
(dB)
–64.5
–63.0
–61.5
–60.0
ab
dc
Frequency (kHz)
A B XOR
000
011
101
110
S
21
(dB)
–61
–60
–59
–58
121
122 123
124
125
Frequency (kHz)
119.5
120.0 120.5
121.0
121.5
121.431 kHz
'1'
'0'
'1'
121.281 kHz
'0'
XNOR
Figure 6 | Demonstration of 2-bit XOR and XNOR logic gates. (a) Frequency responses of the resonator for different logic input conditions, where (0,1)
and (1,0) logic input condition shown in red and blue has high S
21
transmission signal at 121.43 kHz and others have low S
21
transmission signal represented
by 1 and 0, respectively. Truth table of XOR logic gate is shown in the inset. (b) Demonstration of XOR logic operation when the operation frequency is
chosen as 121.43 kHz. Two input signals, A and B are shown in black and red, respectively, where the switch OFF/ON corresponds to 0/1 logic input
conditions. S
21
transmission signal in blue corresponds to the logic output that fulfills the XOR truth table. (c) Frequency responses of the resonator for
different logic input conditions, where (0,0) and (1,1) logic input conditions shown in red and blue, respectively, has low S
21
transmission signal at
121.281 kHz and others have high S
21
transmission signal represented by 0 and 1, respectively. Truth table of XNOR logic output is shown in the inset.
(d) Demonstration of XNOR logic operation when the operating frequency is fixed at 121.281 kHz. Two input signals, A and B are shown in black and red,
respectively, where the switch OFF/ON corresponds to 0/1 logic input conditions. S
21
transmission signal in blue corresponds to the logic output and fulfills
the XNOR truth table.
NATURE COMMUNICATIONS | DOI: 10.1038/ncomms11137 ARTICLE
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