Modeling and optimizing the costs of electronic systems
TL;DR: A process-oriented, scalable cost-modeling tool, the Modular Optimization Environment (MOE), enables a continuous cost-quality-performance trade-off analysis throughout the design and manufacturing process.
Abstract: Today's high-density packaging technologies make early attention to most factors essential in the design of successful products. A process-oriented, scalable cost-modeling tool, the Modular Optimization Environment (MOE), enables a continuous cost-quality-performance trade-off analysis throughout the design and manufacturing process.
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TL;DR: This paper presents a framework of the product lifecycle costing system for supporting decision making, especially the decision making at very early stages of a product lif cycle, built using object oriented modeling methods.
Abstract: Today's competitive business environment imposes new challenges to manufacturing companies. For these companies to survive in this environment, implementing product lifecycle management (PLM) technologies with an emphasis on cost control is one valid approach. PLM is a strategic business approach that applies a consistent set of business solutions to help manufacturing companies manage all the activities related to a product in an integrated way across the lifecycle from customer need to product recycling and disposal. Product lifecycle cost is an important measure for PLM implementation. It can help track and analyze the financial information of activities associated with each phase of a product's lifecycle. The paper presents a framework of the product lifecycle costing system for supporting decision making, especially the decision making at very early stages of a product lifecycle. It can be used as a design support tool to help new product development. A number of methodologies and tools are developed in the system. The case based reasoning method is used to quickly build a new product model. The costs of product development processes related to the new product are calculated using activity based costing methods. Dynamic programming is then used to obtain an optimal set of product development processes with the objective of optimizing the overall product development cost. This system is built using object oriented modeling methods.
58 citations
TL;DR: In this paper, a passive optimized solution combining the advantages from both SMD and integrated technology and avoiding the respective drawbacks is proposed to overcome the size and manufacturing limits of SMD passives mounted on to the system board.
Abstract: Passive components integrated into a high‐density substrate can be a tolerable way to overcome the size and manufacturing limits of SMD passives mounted on to the system board. Still, this technology is perceived as being “too risky” and not cost‐effective. In this paper we propose a “passive optimized” solution combining the advantages from both SMD and integrated technology and avoiding the respective drawbacks. Exemplified by a GPS receiver front end, we present a methodology to assess the possible benefits when using the mixed technology.
25 citations
01 Jan 2008
TL;DR: Technology scaling together with the integration of disparate technologies in a single chip means that device performance continues to outstrip interconnect and packaging capabilities, an industry first.
Abstract: Continued technology scaling together with the integration of disparate technologies in a single chip means that device performance continues to outstrip interconnect and packaging capabilities, an ...
22 citations
Additional excerpts
...1: Cost Model Parameters (reproduced from [174])....
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30 Oct 2001
TL;DR: A test/diagnosis/rework analysis model for use in technical cost modeling of electronic assemblies that can accommodate an arbitrary number of rework attempts on any given assembly and can be used to optimize the fault coverage and rework investment during system tradeoff analyses.
Abstract: This paper presents a test/diagnosis/rework analysis model for use in technical cost modeling of electronic assemblies. The approach includes a model of test operations characterized by fault coverage, false positives, and defects introduced in test, in addition to rework and diagnosis operations that have variable success rates and their own defect introduction mechanisms. The model can accommodate an arbitrary number of rework attempts on any given assembly and can be used to optimize the fault coverage and rework investment during system tradeoff analyses. The model's implementation allows all inputs to the model to be represented as probability distributions thereby accommodating inevitable uncertainties in input data present during tradeoff activities and uses Monte Carlo methods to determine model outputs.
17 citations
01 Jan 2003
12 citations
References
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01 Jan 1986
TL;DR: In this paper, Monte Carlo Evaluation of Finite-Dimensional Integrals (FDIM) is used to evaluate finite-dimensional integral functions. But Monte Carlo evaluation of FDIM is not suitable for simulation of stochastic systems.
Abstract: Preface 1 What is Monte Carlo? 2 A Bit of Probability 3 Sampling Random Variables 4 Monte Carlo Evaluation of Finite-Dimensional Integrals 5 Random Walks, Integral Equations, and Variance Reduction 6 Simulations of Stochastic Systems: Radiation Transport 7 Statistical Physics 8 Quantum Monte Carlo 9 Pseudorandom Numbers
709 citations
TL;DR: A technique is described for evaluating the effectiveness of production tests for large scale integrated (LSI) circuit chips based on a model for the distribution of faults on a chip, which implicitly takes into account such variables as fault simulator characteristics, the feature size, and the manufacturing environment.
Abstract: A technique is described for evaluating the effectiveness of production tests for large scale integrated (LSI) circuit chips. It is based on a model for the distribution of faults on a chip. The model requires two parameters, the average number (n/SUB 0/) of faults on a faulty chip and the yield (y) of good chips. It is assumed that the yield either is known or can be calculated from the available formulas. The other parameter, n/SUB 0/, is determined from an experimental procedure. Once the model is fully characterized, it allows calculation of the field reject rate as a function of the fault coverage. The technique implicitly takes into account such variables as fault simulator characteristics, the feature size, and the manufacturing environment. An actual LSI circuit is used as an example.
111 citations
01 Jan 1994
TL;DR: The present paper presents a meta-analysis of tradeoff analyses for Multichip Systems that aims to clarify the role of Symbols in information modeling and Representation in the design of systems.
Abstract: Preface 1 Introduction 2 Information Modeling and Representation 3 Tradeoff Analysis 4 Design Partitioning 5 Tradeoff Analyses for Multichip Systems List of Symbols Index
58 citations
TL;DR: The author explores the forces driving design validation testing and production testing as the authors move into the new century.
Abstract: Although it is clearly risky to make predictions about what may occur several years in the future, sometimes such projections are necessary. If we have no idea where we are heading and why, the journey may be fraught with even more pitfalls than the constantly changing environment we live in today. And, although change is a constant, some things will stay the same as they have over the last decade or so because they are based on sound reasoning and market dynamics. The author explores the forces driving design validation testing and production testing as we move into the new century.
15 citations