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Modular SoC-design : Minimizing area and power consumption
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This is the main report for Mattias Larsson's degree project for the Master’s program in System-on-Chip to design a modular MPSoC-unit (Multi Processor System ...Abstract:
This is the main report for Mattias Larsson’s degree project for the Master’s pro-gram in System-on-Chip. The main part of this project has been to design a modular MPSoC-unit (Multi Processor Syst ...read more
References
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Journal ArticleDOI
A genetic algorithm tutorial
TL;DR: This tutorial covers the canonical genetic algorithm as well as more experimental forms of genetic algorithms, including parallel island models and parallel cellular genetic algorithms.
Journal ArticleDOI
A high-efficiency CMOS voltage doubler
TL;DR: In this paper, a charge pump cell is used to make a voltage doubler using improved serial switches and a complete power efficiency theory is presented which fits the measurements, and the importance of capacitors is shown with plots of power efficiency versus load and stray capacitors.
Proceedings ArticleDOI
Dynamic power consumption in Virtex™-II FPGA family
TL;DR: The dynamic power consumption in the fabric of Field Programmable Gate Arrays (FPGAs) is analyzed by taking advantage of both simulation and measurement, and it is concluded that dynamic power dissipation of a Virtex-II CLB is 5.9μW per MHz for typical designs, but it may vary significantly depending on the switching activity.
Proceedings ArticleDOI
Energy efficient CMOS microprocessor design
T.D. Burd,Robert W. Brodersen +1 more
TL;DR: A power analysis methodology is developed that allows the energy efficiency of various architectures to be quantified, and provides techniques for either individually optimizing or trading off throughput and energy consumption.
Proceedings ArticleDOI
Managing power and performance for system-on-chip designs using Voltage Islands
David E. Lackey,Paul S. Zuchowski,Thomas R. Bednar,Douglas W. Stout,Scott Whitney Gould,John M. Cohn +5 more
TL;DR: In this article, the authors discuss Voltage Islands, a system architecture and chip implementation methodology that can be used to dramatically reduce active and static power consumption for System-on-Chip (SoC) designs.