Proceedings ArticleDOI
NetFPGA--An Open Platform for Gigabit-Rate Network Switching and Routing
John W. Lockwood,Nick McKeown,G. Watson,Glen Gibb,P. Hartke,Jad Naous,R. Raghuraman,Jianying Luo +7 more
- pp 160-161
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TLDR
A new version of the NetFPGA 2.1 platform has been developed and is available for use by the academic community and has interfaces that can be parameterized, therefore enabling development of modular hardware designs with varied word sizes.Abstract:
The NetFPGA platform enables students and researchers to build high-performance networking systems in hardware. A new version of the NetFPGA platform has been developed and is available for use by the academic community. The NetFPGA 2.1 platform now has interfaces that can be parameterized, therefore enabling development of modular hardware designs with varied word sizes. It also includes more logic and faster memory than the previous platform. Field Programmable Gate Array (FPGA) logic is used to implement the core data processing functions while software running on embedded cores within the FPGA and/or programs running on an attached host computer implement only control functions. Reference designs and component libraries have been developed for the CS344 course at Stanford University. Open-source Verilog code is available for download from the project website.read more
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Hedera: dynamic flow scheduling for data center networks
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Proceedings ArticleDOI
PortLand: a scalable fault-tolerant layer 2 data center network fabric
Radhika Niranjan Mysore,Andreas Pamboris,Nathan Farrington,Nelson Huang,Pardis Miri,Sivasankar Radhakrishnan,Vikram Subramanya,Amin Vahdat +7 more
TL;DR: Through the design and implementation of PortLand, a scalable, fault tolerant layer 2 routing and forwarding protocol for data center environments, it is shown that PortLand holds promise for supporting a ``plug-and-play" large-scale, data center network.
Journal ArticleDOI
The road to SDN: an intellectual history of programmable networks
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References
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Proceedings ArticleDOI
Platform and methodology for teaching design of hardware modules in Internet routers and firewalls
TL;DR: A teaching methodology has been developed which minimizes the learning curve for hardware engineering students that want to develop network modules but are relatively unfamiliar with Asynchronous Transfer Mode (ATM) and/or the Internet Protocol (IP) suite.