Nonlinear modeling and analysis of buck converter using volterra series

A Review on Power Supply Induced Jitter

Abstract: The primary focus of this paper is to discuss the modeling of jitter caused by power supply noise (PSN), named power supply induced jitter (PSIJ). A holistic discussion is presented from the basics of power delivery networks to PSN and eventually to the modeling of PSIJ. The in-depth details and a review of several methodologies available in the literature for the estimation of PSIJ are presented.

Efficient Volterra systems identification using hierarchical genetic algorithms

Abstract: The Volterra series consists of a powerful method for the identification of non-linear relationships. However, the identification of the series active basis sets requires intense research in order to reduce the computational burden of such a procedure. This is a result of a large number of measurements being required in order to produce an adequate estimate, due to overparameterization issues. In this work, we present a robust hierarchical evolutionary technique which employs a heuristic initialization and provides robustness against noise. The advanced solution is based on a genetic algorithm which improves on the computational complexity of existing methods without harming the identification accuracy. The impact of the parameters calibration is evaluated for different signal-to-noise levels and several nonlinear systems considered in the literature.

A Quick Assessment of Nonlinearity in Power Delivery Networks

Abstract: A nonlinear analysis of a DC-DC buck converter is presented in context of its harmonics in a power delivery network (PDN). The closed-form relationships of the harmonic distortions associated with the DC-DC buck converter are derived by Volterra series to estimate the effects in a practical environment using S-parameters. For the validation of the proposed method, the buck converter is designed in a 180 nm LDMOS technology and three test cases are considered by using three different practical PDNs. A close matching is seen between the results obtained by proposed and conventional methods with a significant speedup reported.

Second Order Volterra Filter for Appliance Modelling

Abstract: Availability of large quantities of residential electrical consumption data is bringing considerable attention towards load monitoring, load forecasting, load disaggregation and demand response. Load modelling is the first and most essential step in achieving all the above said tasks. Even though many appliance modelling schemes are presented in the literature, no considerably influential work has been done on modelling appliances under voltage fluctuating environment. Motivated by this fact, we present the design and analysis of a Volterra based appliance modelling scheme which can be used in a voltage fluctuating environment. Principles of Volterra filter, least mean square algorithm for Volterra filter coefficient approximation and applicability of Volterra filter for appliance modelling are discussed. Further, a case study is presented to validate and identify the performance of the model using a data set obtained from a real household. Obtained results show that, Volterra filter can be utilized as an efficient tool for appliance modelling in a supply voltage fluctuating environment. Finally, how Volterra filter modelling can be extended to achieve the non intrusive load monitoring task is discussed.

Fundamentals of Power Electronics

Abstract: Preface. 1. Introduction. I: Converters in Equilibrium. 2. Principles of Steady State Converter Analysis. 3. Steady-State Equivalent Circuit Modeling, Losses, and Efficiency. 4. Switch Realization. 5. The Discontinuous Conduction Mode. 6. Converter Circuits. II: Converter Dynamics and Control. 7. AC Equivalent Circuit Modeling. 8. Converter Transfer Functions. 9. Controller Design. 10. Input Filter Design. 11. AC and DC Equivalent Circuit Modeling of the Discontinuous Conduction Mode. 12. Current Programmed Control. III: Magnetics. 13. Basic Magnetics Theory. 14. Inductor Design. 15. Transformer Design. IV: Modern Rectifiers and Power System Harmonics. 16. Power and Harmonics in Nonsinusoidal Systems. 17. Line-Commutated Rectifiers. 18. Pulse-Width Modulated Rectifiers. V: Resonant Converters. 19. Resonant Conversion. 20. Soft Switching. Appendices: A. RMS Values of Commonly-Observed Converter Waveforms. B. Simulation of Converters. C. Middlebrook's Extra Element Theorem. D. Magnetics Design Tables. Index.

Digital integrated circuits: a design perspective

Abstract: (NOTE: Each chapter begins with an Introduction and concludes with a Summary, To Probe Further, and Exercises and Design Problems.) I. THE FABRICS. 1. Introduction. A Historical Perspective. Issues in Digital Integrated Circuit Design. Quality Metrics of a Digital Design. 2. The Manufacturing Process. The CMOS Manufacturing Process. Design Rules-The Contract between Designer and Process Engineer. Packaging Integrated Circuits. Perspective-Trends in Process Technology. 3. The Devices. The Diode. The MOS(FET) Transistor. A Word on Process Variations. Perspective: Technology Scaling. 4. The Wire. A First Glance. Interconnect Parameters-Capitance, Resistance, and Inductance. Electrical Wire Models. SPICE Wire Models. Perspective: A Look into the Future. II. A CIRCUIT PERSPECTIVE. 5. The CMOS Inverter. The Static CMOS Inverter-An Intuitive Perspective. Evaluating the Robustness of the CMOS Inverter: The Static Behavior. Performance of CMOS Inverter: The Dynamic Behavior. Power, Energy, and Energy-Delay. Perspective: Technology Scaling and Its Impact on the Inverter Metrics. 6. Designing Combinational Logic Gates in CMOS. Static CMOS Design. Dynamic CMOS Design. How to Choose a Logic Style? Perspective: Gate Design in the Ultra Deep-Submicron Era. 7. Designing Sequential Logic Circuits. Timing Metrics for Sequential Circuits. Classification of Memory Elements. Static Latches and Registers. Dynamic Latches and Registers. Pulse Registers. Sense-Amplifier Based Registers. Pipelining: An Approach to Optimize Sequential Circuits. Non-Bistable Sequential Circuits. Perspective: Choosing a Clocking Strategy. III. A SYSTEM PERSPECTIVE. 8. Implementation Strategies for Digital ICS. From Custom to Semicustom and Structured-Array Design Approaches. Custom Circuit Design. Cell-Based Design Methodology. Array-Based Implementation Approaches. Perspective-The Implementation Platform of the Future. 9. Coping with Interconnect. Capacitive Parasitics. Resistive Parasitics. Inductive Parasitics. Advanced Interconnect Techniques. Perspective: Networks-on-a-Chip. 10. Timing Issues in Digital Circuits. Timing Classification of Digital Systems. Synchronous Design-An In-Depth Perspective. Self-Timed Circuit Design. Synchronizers and Arbiters. Clock Synthesis and Synchronization Using a Phased-Locked Loop. Future Directions and Perspectives. 11. Designing Arithmetic Building Blocks. Datapaths in Digital Processor Architectures. The Adder. The Multiplier. The Shifter. Other Arithmetic Operators. Power and Spped Trade-Offs in Datapath Structures. Perspective: Design as a Trade-off. 12. Designing Memory and Array Structures. The Memory Core. Memory Peripheral Circuitry. Memory Reliability and Yield. Power Dissipation in Memories. Case Studies in Memory Design. Perspective: Semiconductor Memory Trends and Evolutions. Problem Solutions. Index.

Computer Methods for Circuit Analysis and Design

Abstract: Computer methods for circuit analysis and design , Computer methods for circuit analysis and design , مرکز فناوری اطلاعات و اطلاع رسانی کشاورزی