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Journal ArticleDOI

On-chip hot spot cooling using silicon thermoelectric microcoolers

02 Aug 2007-Journal of Applied Physics (American Institute of Physics)-Vol. 102, Iss: 3, pp 034503
TL;DR: In this article, a three-dimensional analytical thermal model of the silicon chip was developed and used to predict the on-chip hot spot cooling performance, and the effects of hot spot size, hot spot heat flux, silicon chip thickness, microcooler size, doping concentration in the silicon, and parasitic Joule heating from electric contact resistance on the cooling of onchip hot spots, were investigated in detail.
Abstract: Thermal management of microprocessors has become an increasing challenge in recent years because of localized high flux hot spots which cannot be effectively removed by conventional cooling techniques. This paper describes the use of the silicon chip itself as a thermoelectric cooler to suppress the hot spot temperature. A three-dimensional analytical thermal model of the silicon chip, including localized thermoelectric cooling, thermoelectric heating, silicon Joule heating, hot spot heating, background heating, and conductive/convective cooling on the back of the silicon chip, is developed and used to predict the on-chip hot spot cooling performance. The effects of hot spot size, hot spot heat flux, silicon chip thickness, microcooler size, doping concentration in the silicon, and parasitic Joule heating from electric contact resistance on the cooling of on-chip hot spots, are investigated in detail.
Citations
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Journal ArticleDOI
01 Feb 2021-Energy
TL;DR: In this article, the advantages and shortcomings of thermal enhancement technologies in different structural micro heat sinks are presented, and the barriers and challenges for the developments of thermal management of electronic devices by micro heat sink are discussed, and future directions of the research topic are provided.

217 citations

Journal ArticleDOI
TL;DR: The physical phenomena underpinning the most promising on-chip thermal management approaches for hot spot remediation, along with basic modeling equations and typical results are described in this paper, where attention is devoted to thermoelectric microcoolers.
Abstract: The rapid emergence of nanoelectronics, with the consequent rise in transistor density and switching speed, has led to a steep increase in microprocessor chip heat flux and growing concern over the emergence of on-chip “hot spots”. The application of on-chip high heat flux cooling techniques is today a primary driver for innovation in the electronics industry. In this paper, the physical phenomena underpinning the most promising on-chip thermal management approaches for hot spot remediation, along with basic modeling equations and typical results are described. Attention is devoted to thermoelectric microcoolers — using mini-contcat enhancement and in-plane thermoelectric currents, orthotropic TIM’s/heat spreaders, and phase-change microgap coolers.Copyright © 2009 by ASME

143 citations

Journal ArticleDOI
TL;DR: In this article, a comprehensive analysis of chip cooling for various nanometer scale bulk-CMOS and silicon-on-insulator (SOI) technologies is presented, which combines device, circuit and system level considerations.
Abstract: Alongside innovative device, circuit, and microarchitecture level techniques to alleviate power and thermal problems in nanoscale CMOS-based integrated circuits (ICs), chip cooling could be an effective knob for power and thermal management. This paper analyzes IC cooling while focusing on the practical temperature range of operation. Comprehensive analyses of chip cooling for various nanometer scale bulk-CMOS and silicon-on-insulator (SOI) technologies are presented. Unlike all previous works, this analysis employs a holistic approach (combines device, circuit and system level considerations) and also takes various electrothermal couplings between power dissipation, operating frequency and die temperature into account. While chip cooling always gives performance gain at the device and circuit level, it is shown that system level power defines a temperature limit beyond which cooling gives diminishing returns and an associated cost that may be prohibitive. A scaling analysis of this temperature limit is also presented. Furthermore, it is shown that on-chip thermal gradients cannot be mitigated by global chip cooling and that localized cooling can be more effective in removing hot-spots.

93 citations


Cites background from "On-chip hot spot cooling using sili..."

  • ...This is because the extra power spent on cooling is lower than the corresponding saving in leakage power....

    [...]

Journal ArticleDOI
TL;DR: In this paper, the compatibility of gallium with four typical metal substrates (6063 Aluminum-Alloy, T2 Copper- Alloy, Anodic Coloring 6063 Aluminum Alloy and 1Cr18Ni9 Stainless Steel) was comprehensively investigated in order to better understand the corrosion mechanisms and help find out the most suitable structure material for making a liquid metal cooling device.
Abstract: The limitation of the currently available thermal management method has put an ever serious challenge for computer chip designers. A liquid metal with low melting point around room temperature was recently identified as a powerful coolant of driving heat away because of its superior thermo-physical properties and the unique ability to be driven efficiently by a completely silent electromagnetic pump. However, the adoption of gallium, one of the best candidates as metal coolant so far, may cause serious corrosion to the structure materials and subsequently affect the performance or even dangerous running of the cooling system. To address this emerging critical issue, here the compatibility of gallium with four typical metal substrates (6063 Aluminum-Alloy, T2 Copper-Alloy, Anodic Coloring 6063 Aluminum-Alloy and 1Cr18Ni9 Stainless Steel) was comprehensively investigated in order to better understand the corrosion mechanisms and help find out the most suitable structure material for making a liquid metal cooling device. To grasp in detail the dynamic corrosion behavior, an image acquisition and contrasting method was developed. Moreover, corrosion morphology analyses were performed by means of scanning electron microscope (SEM). The chemical compositions of the corroded layers were evaluated using energy dispersive spectrometry (EDS). According to the experiments, it was found that, the corrosion of the 6063 Aluminum-Alloy was rather evident and serious under the temperature range for chip cooling. The loose corrosion product will not only have no protection for the inner substrate, but also accelerate the corrosion process. Compared to the 6063 Aluminum-Alloy, T2 Copper-Alloy showed a slow and general corrosion, but part of the corrosion product can shed from the substrate, which will accelerate corrosion action and may block the flowing channel. Anodic Coloring 6063 Aluminum-Alloy and 1Cr18Ni9 Stainless Steel were found to have excellent corrosion resistance among these four specimens. No evident corrosion phenomena were found under the examination of SEM and EDS when exposed for 30 days at the temperature of 60°C, which suggests their suitability as structure materials for the flow of liquid metal. However, as for the Anodic Coloring 6063 Aluminum-Alloy, surface treatment and protection are of vital importance. The present study is of significance for making a liquid metal chip cooling device which can actually be used in the future computer industry.

88 citations

Journal ArticleDOI
TL;DR: In this article, an energy-efficient micro heat sink was proposed for thermal management of microprocessors with heterogeneous power distributions, where rectangular microchannels were used over the low heat-flux zone (background area), and an array of cylindrical pinfins were incorporated over the high heat-fluid zone (hotspot area) of the heat sink.

73 citations

References
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Book
01 Jan 1973
TL;DR: CRC handbook of chemistry and physics, CRC Handbook of Chemistry and Physics, CRC handbook as discussed by the authors, CRC Handbook for Chemistry and Physiology, CRC Handbook for Physics,
Abstract: CRC handbook of chemistry and physics , CRC handbook of chemistry and physics , کتابخانه مرکزی دانشگاه علوم پزشکی تهران

52,268 citations

Journal ArticleDOI
11 Oct 2001-Nature
TL;DR: Th thin-film thermoelectric materials are reported that demonstrate a significant enhancement in ZT at 300 K, compared to state-of-the-art bulk Bi2Te3 alloys, and the combination of performance, power density and speed achieved in these materials will lead to diverse technological applications.
Abstract: Thermoelectric materials are of interest for applications as heat pumps and power generators. The performance of thermoelectric devices is quantified by a figure of merit, ZT, where Z is a measure of a material's thermoelectric properties and T is the absolute temperature. A material with a figure of merit of around unity was first reported over four decades ago, but since then-despite investigation of various approaches-there has been only modest progress in finding materials with enhanced ZT values at room temperature. Here we report thin-film thermoelectric materials that demonstrate a significant enhancement in ZT at 300 K, compared to state-of-the-art bulk Bi2Te3 alloys. This amounts to a maximum observed factor of approximately 2.4 for our p-type Bi2Te3/Sb2Te3 superlattice devices. The enhancement is achieved by controlling the transport of phonons and electrons in the superlattices. Preliminary devices exhibit significant cooling (32 K at around room temperature) and the potential to pump a heat flux of up to 700 W cm-2; the localized cooling and heating occurs some 23,000 times faster than in bulk devices. We anticipate that the combination of performance, power density and speed achieved in these materials will lead to diverse technological applications: for example, in thermochemistry-on-a-chip, DNA microarrays, fibre-optic switches and microelectrothermal systems.

4,921 citations

Journal ArticleDOI
27 Sep 2002-Science
TL;DR: It is demonstrated that improved cooling values relative to the conventional bulk (Bi,Sb)2(Se,Te)3thermoelectric materials using a n-type film in a one-leg thermoelectrics device test setup, which cooled the cold junction 43.7 K below the room temperature hot junction temperature of 299.8 K.
Abstract: PbSeTe-based quantum dot superlattice structures grown by molecular beam epitaxy have been investigated for applications in thermoelectrics. We demonstrate improved cooling values relative to the conventional bulk (Bi,Sb) 2 (Se,Te) 3 thermoelectric materials using a n-type film in a one-leg thermoelectric device test setup, which cooled the cold junction 43.7 K below the room temperature hot junction temperature of 299.7 K. The typical device consists of a substrate-free, bulk-like (typically 0.1 millimeter in thickness, 10 millimeters in width, and 5 millimeters in length) slab of nanostructured PbSeTe/PbTe as the n-type leg and a metal wire as the p-type leg.

2,371 citations

Journal ArticleDOI
TL;DR: In this article, an analysis of the performance of integrated silicon thermopiles is presented and several thermal sensors that measure magnetic, mechanical, radiation and chemical signals, as well as electrical converters are reviewed.

418 citations

Journal ArticleDOI
TL;DR: The Seebeck effect has been measured from liquid hydrogen temperatures into the intrinsic range for a series of single-crystal silicon samples in which varying concentrations of donor and acceptor atoms have been incorporated as discussed by the authors.
Abstract: The Seebeck effect has been measured from liquid hydrogen temperatures into the intrinsic range for a series of single-crystal silicon samples in which varying concentrations of donor and acceptor atoms have been incorporated. Large values of Seebeck voltage believed to be caused by the type of phonon-electron coupling previously postulated as occurring in germanium have been found. This effect is found to be dependent upon charge carrier concentration, and upon sample dimension below 100\ifmmode^\circ\else\textdegree\fi{}K. A low-temperature reversal of the sign of the Seebeck voltage is observed for large carrier concentrations. It is understandable in terms of impurity band conduction. The behavior above room temperature into the intrinsic range is found to be consistent with electrical conductivity data.

373 citations