On the Charge Sheet Superjunction (CSSJ) MOSFET
TL;DR: In this paper, a simple analytical model is developed for the drain-source capacitance of the charge sheet superjunction (CSSJ) MOSFET, and the model is shown to apply to the Superjunction as well.
Abstract: This paper provides more insight into the operation of the charge sheet superjunction (CSSJ) proposed recently, whose specific on-resistance for a given breakdown voltage is even lower than that of a Superjunction (SJ). It is shown how the SJ and the CSSJ both evolve from a simple Gamma-shaped p+-n junction in which the heavily doped region surrounds the lightly doped region; the peak field in such a 2-D junction is less than that in a plane junction. The phenomena underlying the I- V and C -V characteristics of the CSSJ MOSFET are clarified with the help of charge and potential simulations. A simple analytical model is developed for the drain-source capacitance of the CSSJ MOSFET; the model is shown to apply to SJ MOSFET as well. It is argued that the insulator charges providing the charge sheet essential for CSSJ operation will not present the same reliability problems as those due to trapped charge in the gate insulator of small-signal MOSFETs; this is because the insulator field distribution in a CSSJ differs significantly from that in a small-signal MOSFET. The insight provided in this paper should build a strong motivation for the practical implementation of the new structure.
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TL;DR: In this paper, a gate enhanced power UMOSFET (GE-UMOS) was proposed to decrease the specific on-resistance of the device, where the deep trench polysilicon electrode is contacted to the gate electrode, maintaining the breakdown voltage and forming the high electron current density at side n-drift region, thus resulting in a lower on -resistance compared to the superjunction structure and gradient oxide-bypassed (GOB) structure.
Abstract: Gate enhanced power UMOSFET (GE-UMOS) is proposed to decrease the specific on -resistance of the device. The key feature of this structure is that the deep trench polysilicon electrode is contacted to the gate electrode, maintaining the breakdown voltage and forming the high electron current density at side n-drift region, thus resulting in a lower on -resistance compared to the superjunction structure and gradient oxide-bypassed (GOB) structure. Furthermore, the performance of GE-UMOS is proved by comparing with the GOB-UMOS structure.
33 citations
Cites methods from "On the Charge Sheet Superjunction (..."
...TO OVERCOME the tradeoff relationship between specific ON-state resistance (RON) and breakdown voltage (BV) in the ideal silicon device [1], a p-n superjunction (SJ) structure was proposed in lowering the RON without affecting the BV [2], [3]....
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TL;DR: Superjunction has arguably been the most creative and important concept in power device field Superjunction vertical diffused MOSFET (SJ VDMOS) has been commercialized and the research effort to l
Abstract: Superjunction has arguably been the most creative and important concept in power device field Superjunction vertical diffused MOSFET (SJ VDMOS) has been commercialized and the research effort to l
27 citations
TL;DR: In this article, an optimized gate-enhanced (GE) power UMOSFET with split gate (SGE-UMOS) was proposed, which shows the reduction in specific on-state resistance (Rsp) at a breakdown voltage of 119 V as compared to the gradient oxide-bypassed (GOB) UMOS and GE-UMMS devices, which is due to the higher N-type concentration in the drift region.
Abstract: An optimized gate-enhanced (GE) power UMOSFET with split gate (SGE-UMOS) is proposed. This device shows the reduction in specific on-state resistance (Rsp) at a breakdown voltage of 119 V as compared to the gradient oxide-bypassed (GOB) UMOS and GE-UMOS devices, which is due to the higher N-type concentration in the drift region. In addition, the split-gate floating structure in SGE-UMOS also reduces the gate-source electrode parasitic capacitor. The numerical simulation results indicate that the proposed device features high performance with improved Rsp and Qg as compared to that of the GOB-UMOS and GE-UMOS devices.
20 citations
Cites background from "On the Charge Sheet Superjunction (..."
...FOR OVERCOMING the difficulties of a p-n-superjunction (SJ) structure in a practical fabrication process, such as ideal p-n doping matching and small column width for a device below 300 V [1], [2], the gradient oxide-bypassed (GOB) structure was proposed to maintain fabrication simplicity....
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TL;DR: In this paper, a simple device and electric circuit is proposed to measure the insulating properties of aluminum oxide and the transport properties of SnO2 as well, which indicate a fair insulation when four layers or Al2O3 are grown on the tin dioxide film, concomitant with thermal annealing.
Abstract: Aiming for the investigation of insulating properties of aluminum oxide (Al2O3) layers, as well as the combination of this oxide with tin dioxide (SnO2) for application in transparent field effect transistors, Al thin films are deposited by resistive evaporation on top of SnO2 thin films deposited by sol–gel dip-coating process. The oxidation of Al films to Al2O3 are carried out by thermal annealing at 500 °C in room conditions or oxygen atmosphere. X-ray diffraction data indicate that tetragonal Al2O3 is indeed obtained. A simple device and electric circuit is proposed to measure the insulating properties of aluminum oxide and the transport properties of SnO2 as well. Results indicate a fair insulation when four layers or Al2O3 are grown on the tin dioxide film, concomitant with thermal annealing between each layer. The current magnitude through the insulating layer is only 0.2% of the current through the semiconductor film, even though the conductivity of the SnO2 alone is not very high (the average resistivity is 2 Ω cm), because no doping is used. The presented results are a good indication that this combination may be useful for transparent devices.
14 citations
TL;DR: In this paper, the authors presented the unique features exhibited by power 4H-SiC UMOSFET in which N and P type columns (NPC) in the drift region are incorporated to improve the breakdown voltage, the specific on-resistance, and the total lateral cell pitch.
9 citations
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TL;DR: In this paper, a review of the literature in the area of alternate gate dielectrics is given, based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success.
Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...
5,711 citations
"On the Charge Sheet Superjunction (..." refers background in this paper
...By analogy to the conditions in the MOSFET, we anticipate that, in CSSJ, holes will get trapped in the interfacial layer, so that the thickness of the Al2O3 insulator will not affect charge trapping and, hence, the reliability; moreover, the interfacial state density for Al2O3–Si interface is < 10(11) cm−2 [10], i....
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...In MOSFETs with Al2O3 dielectric, for negative gate bias, it has been observed that holes get trapped not in the Al2O3 layer, but in the interfacial SiO2 layer present between Al2O3 and Si, and so, this trapping is independent of Al2O3 thickness [11]....
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...[11] A. Kerber et al., “Strong correlation between dielectric reliability and charge trapping in SiO2/A12O3 gate stacks with TiN electrodes,” in VLSI Symp....
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...Al2O3 is the best dielectric after SiO2 [10] with good thermal properties, a high critical breakdown field = 5 MV/cm, and ∼100 times smaller leakage current than SiO2....
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...[13] S. Ogawa et al., “Interface-trap generation at ultrathin SiO2 (4–6 nm)-Si interfaces during negative-bias temperature aging,” J. Appl....
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TL;DR: In this article, a new theory of semiconductor devices, called "semiconductor superjunction (SJ) theory", is presented, which utilizes a number of alternately stacked, p-and n-type, heavily doped, thin semiconductor layers.
Abstract: A new theory of semiconductor devices, called "semiconductor superjunction (SJ) theory", is presented. To overcome the trade-off relationship between breakdown voltage and on-resistance of conventional semiconductor devices, SJ devices utilize a number of alternately stacked, p- and n-type, heavily doped, thin semiconductor layers. By controlling the degree of doping and the thickness of these layers, according to the SJ theory, this structure operates as a pn junction with low on-resistance and high breakdown voltage. Analytical formulas for the ideal specific on-resistance and the ideal breakdown voltage of SJ devices are theoretically derived. Analysis based on the formulas and device simulations reveals that the on-resistance of SJ devices can be reduced to less than 10-2 that of conventional devices.
637 citations
"On the Charge Sheet Superjunction (..." refers background in this paper
...The Superjunction (SJ) MOSFET structure was proposed [1] to lower the RONSP below the silicon limit....
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TL;DR: In this article, the authors review the status of reliability studies of high-k gate dielectrics and try to illustrate it with experimental results, showing that the reliability of Hf-based materials is influenced both by the interfacial layer as well as the high k layer.
Abstract: High-k gate dielectrics, particularly Hf-based materials, are likely to be implemented in CMOS advanced technologies. One of the important challenges in integrating these materials is to achieve lifetimes equal or better than their SiO/sub 2/ counterparts. In this paper we review the status of reliability studies of high-k gate dielectrics and try to illustrate it with experimental results. High-k materials show novel reliability phenomena related to the asymmetric gate band structure and the presence of fast and reversible charge. Reliability of high-k structures is influenced both by the interfacial layer as well as the high-k layer. One of the main issues is to understand these new mechanisms in order to asses the lifetime accurately and reduce them.
499 citations
"On the Charge Sheet Superjunction (..." refers background in this paper
...the insulator [13], [14], and insulator dimensions [15]....
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06 Dec 1998
TL;DR: In this article, the authors proposed a new device concept for high voltage power devices based on charge compensation in the drift region of the transistor, which achieved a shrink factor of 5 versus the actual state of the art in power MOSFETs.
Abstract: For the first time a new device concept for high voltage power devices has been realized in silicon. Our 600 V-COOLMOS/sup TM/ reaches an area specific on-resistance of typically 3.5 /spl Omega//spl middot/mm/sup 2/. Our technology thus offers a shrink factor of 5 versus the actual state of the art in power MOSFETs. The device concept is based on charge compensation in the drift region of the transistor. We increase the doping of the vertical drift region roughly by one order of magnitude and counterbalance this additional charge by the implementation of fine structured columns of the opposite doping type. The blocking voltage of the transistor remains thus unaltered. The charge compensating columns do not contribute to the current conduction during the turn-on state. Nevertheless the drastically increased doping of the drift region allows the above mentioned reduction of the on-resistance.
464 citations
"On the Charge Sheet Superjunction (..." refers background in this paper
...behavior of SJ MOSFETs [ 18 ] has not been explained in detail in literature....
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TL;DR: In this paper, surface recombination velocities as low as 10 cm/s have been obtained by treated atomic layer deposition (ALD) of Al 2 O 3 layers on p-type CZ silicon wafers.
441 citations
"On the Charge Sheet Superjunction (..." refers background in this paper
...One can use Al2O3, which has a negative fixed charge at its interface with silicon [8], [9] as the insulator, the magnitude of this fixed charge ranges between −1 × 10(12) cm−2 to −1 × 10(13) cm−2 [8] and high aspect ratio trenches have been filled...
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