On the Charge Sheet Superjunction (CSSJ) MOSFET
TL;DR: In this paper, a simple analytical model is developed for the drain-source capacitance of the charge sheet superjunction (CSSJ) MOSFET, and the model is shown to apply to the Superjunction as well.
Abstract: This paper provides more insight into the operation of the charge sheet superjunction (CSSJ) proposed recently, whose specific on-resistance for a given breakdown voltage is even lower than that of a Superjunction (SJ). It is shown how the SJ and the CSSJ both evolve from a simple Gamma-shaped p+-n junction in which the heavily doped region surrounds the lightly doped region; the peak field in such a 2-D junction is less than that in a plane junction. The phenomena underlying the I- V and C -V characteristics of the CSSJ MOSFET are clarified with the help of charge and potential simulations. A simple analytical model is developed for the drain-source capacitance of the CSSJ MOSFET; the model is shown to apply to SJ MOSFET as well. It is argued that the insulator charges providing the charge sheet essential for CSSJ operation will not present the same reliability problems as those due to trapped charge in the gate insulator of small-signal MOSFETs; this is because the insulator field distribution in a CSSJ differs significantly from that in a small-signal MOSFET. The insight provided in this paper should build a strong motivation for the practical implementation of the new structure.
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TL;DR: In this paper, a region with a graded doping density (GD region) was inserted in the drift region of a power 4H-SiC UMOSFET to increase the uniformity of the electric field profile.
Abstract: In this paper, we show how breakdown voltage (VBR) and the specific on-resistance (Ron) can be improved simply by controlling of the electric field in a power 4H-SiC UMOSFET. The key idea in this work is increasing the uniformity of the electric field profile by inserting a region with a graded doping density (GD region) in the drift region. The doping density of inserted region is decreased gradually from top to bottom, called Graded Doping Region UMOSFET (GDR-UMOSFET). The GD region results in a more uniform electric field profile in comparison with a conventional UMOSFET (C-UMOSFET) and a UMOSFET with an accumulation layer (AL-UMOSFET). This in turn improves breakdown voltage. Using two-dimensional two-carrier simulation, we demonstrate that the GDR-UMOSFET shows higher breakdown voltage and lower specific on-resistance. Our results show the maximum breakdown voltage of 1340 V is obtained for the GDR-UMOSFET with 10 µm drift region length, while at the same drift region length and approximated doping density, the maximum breakdown voltages of the C-UMOSFET and the AL-UMOSFET structures are 534 V and 703 V, respectively.
7 citations
TL;DR: In this article, the authors discuss details of the charge sheet super junction (CSSJ) in 4H-Silicon Carbide (SiC) and give numerical simulations to establish that, in spite of $E_{C}$ differences, the SiC CSSJ inherits the advantage of upto 15% higher $V_{BR}$ compared to SiC SJ, from its Si counterparts.
Abstract: We discuss details of the Charge Sheet SuperJunction (CSSJ) in 4H-Silicon Carbide (SiC). This device was earlier proposed in Si material. A CSSJ is obtained by replacing the p-pillar of a SJ by a bilayer insulator, e.g., Al2O3/SiO2; the inter-layer interface of this insulator has a negative charge-sheet, whose magnitude is easily controlled via the insulator deposition temperature. This charge-sheet depletes the n-pillar. Two potential advantages of this structural modification are brought out. First, it can avoid the problems related to SiC SJ’s p-pillar fabrication. Second, it can lower the specific-on resistance, $R_{ONSP}$ , below that of SJ by 5–45 %, since SiC technology allows the insulator to be thinner than the p-pillar. The critical field, $E_{C}$ , in SiC is > 10 times higher than that in Si. We give an analytical breakdown voltage, $V_{BR}$ , model, which shows that the $V_{BR}$ sensitivity to charge imbalance due to inevitable process variations is inversely proportional to $E_{C}$ ; hence, this sensitivity of CSSJ in SiC is > 10 times lower than that in Si. On the other hand, we give numerical simulations to establish that, in spite of $E_{C}$ differences, the SiC CSSJ inherits the advantage of upto 15% higher $V_{BR}$ compared to SiC SJ, from its Si counterparts. We show how our prior analytical procedure of designing a SJ can be adapted to design a CSSJ having a lower $R_{ONSP}$ than the SJ, at a specified $V_{BR}$ in 1–10 kV range and charge imbalance ≤ 20 %. Our work should strengthen the motivation for fabricating the CSSJ in SiC.
5 citations
Cites background or methods from "On the Charge Sheet Superjunction (..."
...Reference [5] has argued that insulator charges do not always pose reliability problems....
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...Most qualitative aspects presented here follow those reported in [3], [5] considering a Si device....
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...layer as a function of reverse bias were discussed, illustrated pictorially and validated with TCAD in Section IV-A of our prior work on Si CSSJ [5]....
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...Our subsequent work [5] explained the evolution of the CSSJ and SJ structures from a simple -shaped p+-n junction, and also, the practicability of the CSSJ concept....
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...Moreover, the RONSP formulae given below include the n-pillar depletion width, Wd, under zero-bias, denoted Wd0, which was ignored in prior works [3], [5]....
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TL;DR: In this article, the positive and negative effects of oxide fixed charge on the breakdown characteristic of lateral SiC super junction devices are studied, and it is shown that the negative fixed charge acts as a like p-pillar (or n-pillar) and enhances the depletion of n-pillars, which result in a charge compensation and improvement of the breakdown characteristics of the devices.
Abstract: In this paper, the positive and negative effects of oxide fixed charge on the breakdown characteristic of lateral SiC super junction devices are studied. Simulation results show that in the super junction devices with oxide layer, the negative (or positive) fixed charge on the SiO2/SiC interface act as a like p-pillar (or n-pillar) and enhance the depletion of n-pillar (or p-pillar), which result in a charge compensation and improvement of the breakdown characteristics of the devices. At the same time, a phenomenon of electric field crowding can be caused by the fixed charge and result in a decreasing of the breakdown voltage, this negative effect can be suppressed sufficiently by a field plate.
3 citations
Additional excerpts
...As shown in Fig.4(a), under a reverse bias, there is electric field crowding at point B - the bottom interface of SiO2/SiC in CSSJ structure....
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...The CSSJ diode is shown in Fig.3....
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...Fig.3 Single cell of CSSJ diode with negative fixed charge on the SiO2/SiC interface The negative effect of the oxide fixed charge So far, it seems that all of that brought by fixed charge are beneficial....
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...This phenomenon is also found in the CSSJ structure....
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...In the CSSJ structure, in order to keep a charge balance, Nf must increase with the doping concentration (Nd) of n-pillar increasing....
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14 Jun 2021
TL;DR: In this paper, a novel charge-balanced (CB) silicon carbide (SiC) MOSFET that achieved a specific on-resistance of 10 mΩ•cm2 at 4.5 kV breakdown voltage, surpassing the 1-D SiC unipolar limit, was presented.
Abstract: This work demonstrates a novel charge-balanced (CB) silicon carbide (SiC) MOSFET that boasts a specific on-resistance of 10 mΩ•cm2 at 4.5 kV breakdown voltage, surpassing the 1-D SiC unipolar limit. This is achieved through buried p-doped regions inside the drift layers, which are more easily scalable to higher voltages compared to the p-doped pillars used in super-junction (SJ) devices. Medium-voltage CB SiC MOSFETs with different p-doped bus widths and pitches have been fabricated and characterized in this work. The unique microstructure of these devices causes interesting macro-scale characteristics, such as distinctive steps in the capacitance–voltage curves and a turn-on voltage tail that reduces with increased temperature. The switching energy of the CB MOSFET is 92% lower than that of an IGBT at 150 °C. This paper presents and interprets these intriguing static and dynamic characteristics.
1 citations
Cites background from "On the Charge Sheet Superjunction (..."
...The cause of a similar singular step seen in the output capacitance of SJ MOSFETs has been identified [12] and its contribution to harmonic generation has also been studied [13]....
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01 Apr 2020
TL;DR: In this article, the authors proposed a charge sheet super junction (CSSJ) in 4H-Silicon Carbide (SiC) material, where the p-pillar is replaced by an insulator such as Al 2 O 3 which has a fixed negative charge at its interface with the SiO 2 used as a liner before depositing Al O 3 this negative charge simulates the ionized p-dopants.
Abstract: SuperJunctions (SJs) have long been realized in Si. However, their fabrication in 4H-Silicon Carbide (SiC) has been problematic because of poor control of the p-dopant activation efficiency in SiC. We propose that this problem related to SiC material be overcome using a version of SJ called Charge Sheet SJ (CSSJ) which we proposed in the context of Si material a decade ago. In CSSJ, the p-pillar is replaced by an insulator such as Al 2 O 3 which has a fixed negative charge at its interface with the SiO 2 used as a liner before depositing Al 2 O 3 this negative charge simulates the ionized p-dopants, and can be easily controlled via the Al 2 O 3 deposition temperature. Also, it may be easier to deposit an insulator rather than realize a p-pillar, in a high aspect ratio trench. We build the motivation for fabricating the CSSJ in SiC by outlining its possible fabrication steps, and reporting its TCAD simulations for pillars of $5\ \mu \mathrm{m}$ width, $18\ \mu \mathrm{m}$ length and $2-8\times 10^{12}\mathrm{cm}^{-2}$ charge. We find that the 4-H SiC CSSJ can have 40% lower specific on-resistance and up to 15% higher breakdown voltage than an SJ. Further, as compared to CSSJ in Si, the breakdown voltage of a CSSJ in SiC is $>$ ten times less sensitive to pillar charge imbalance arising from process variations.
1 citations
Cites background from "On the Charge Sheet Superjunction (..."
...Instead, one has to be careful to maintain the Al2O3 deposition temperature within ±3OC so that the imbalance level can be kept below 5% [3]....
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...1(b) and showed its superiority over SJ through numerical simulations in silicon material [3]....
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References
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TL;DR: In this paper, a review of the literature in the area of alternate gate dielectrics is given, based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success.
Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...
5,711 citations
"On the Charge Sheet Superjunction (..." refers background in this paper
...By analogy to the conditions in the MOSFET, we anticipate that, in CSSJ, holes will get trapped in the interfacial layer, so that the thickness of the Al2O3 insulator will not affect charge trapping and, hence, the reliability; moreover, the interfacial state density for Al2O3–Si interface is < 10(11) cm−2 [10], i....
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...In MOSFETs with Al2O3 dielectric, for negative gate bias, it has been observed that holes get trapped not in the Al2O3 layer, but in the interfacial SiO2 layer present between Al2O3 and Si, and so, this trapping is independent of Al2O3 thickness [11]....
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...[11] A. Kerber et al., “Strong correlation between dielectric reliability and charge trapping in SiO2/A12O3 gate stacks with TiN electrodes,” in VLSI Symp....
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...Al2O3 is the best dielectric after SiO2 [10] with good thermal properties, a high critical breakdown field = 5 MV/cm, and ∼100 times smaller leakage current than SiO2....
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...[13] S. Ogawa et al., “Interface-trap generation at ultrathin SiO2 (4–6 nm)-Si interfaces during negative-bias temperature aging,” J. Appl....
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TL;DR: In this article, a new theory of semiconductor devices, called "semiconductor superjunction (SJ) theory", is presented, which utilizes a number of alternately stacked, p-and n-type, heavily doped, thin semiconductor layers.
Abstract: A new theory of semiconductor devices, called "semiconductor superjunction (SJ) theory", is presented. To overcome the trade-off relationship between breakdown voltage and on-resistance of conventional semiconductor devices, SJ devices utilize a number of alternately stacked, p- and n-type, heavily doped, thin semiconductor layers. By controlling the degree of doping and the thickness of these layers, according to the SJ theory, this structure operates as a pn junction with low on-resistance and high breakdown voltage. Analytical formulas for the ideal specific on-resistance and the ideal breakdown voltage of SJ devices are theoretically derived. Analysis based on the formulas and device simulations reveals that the on-resistance of SJ devices can be reduced to less than 10-2 that of conventional devices.
637 citations
"On the Charge Sheet Superjunction (..." refers background in this paper
...The Superjunction (SJ) MOSFET structure was proposed [1] to lower the RONSP below the silicon limit....
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TL;DR: In this article, the authors review the status of reliability studies of high-k gate dielectrics and try to illustrate it with experimental results, showing that the reliability of Hf-based materials is influenced both by the interfacial layer as well as the high k layer.
Abstract: High-k gate dielectrics, particularly Hf-based materials, are likely to be implemented in CMOS advanced technologies. One of the important challenges in integrating these materials is to achieve lifetimes equal or better than their SiO/sub 2/ counterparts. In this paper we review the status of reliability studies of high-k gate dielectrics and try to illustrate it with experimental results. High-k materials show novel reliability phenomena related to the asymmetric gate band structure and the presence of fast and reversible charge. Reliability of high-k structures is influenced both by the interfacial layer as well as the high-k layer. One of the main issues is to understand these new mechanisms in order to asses the lifetime accurately and reduce them.
499 citations
"On the Charge Sheet Superjunction (..." refers background in this paper
...the insulator [13], [14], and insulator dimensions [15]....
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06 Dec 1998
TL;DR: In this article, the authors proposed a new device concept for high voltage power devices based on charge compensation in the drift region of the transistor, which achieved a shrink factor of 5 versus the actual state of the art in power MOSFETs.
Abstract: For the first time a new device concept for high voltage power devices has been realized in silicon. Our 600 V-COOLMOS/sup TM/ reaches an area specific on-resistance of typically 3.5 /spl Omega//spl middot/mm/sup 2/. Our technology thus offers a shrink factor of 5 versus the actual state of the art in power MOSFETs. The device concept is based on charge compensation in the drift region of the transistor. We increase the doping of the vertical drift region roughly by one order of magnitude and counterbalance this additional charge by the implementation of fine structured columns of the opposite doping type. The blocking voltage of the transistor remains thus unaltered. The charge compensating columns do not contribute to the current conduction during the turn-on state. Nevertheless the drastically increased doping of the drift region allows the above mentioned reduction of the on-resistance.
464 citations
"On the Charge Sheet Superjunction (..." refers background in this paper
...behavior of SJ MOSFETs [ 18 ] has not been explained in detail in literature....
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TL;DR: In this paper, surface recombination velocities as low as 10 cm/s have been obtained by treated atomic layer deposition (ALD) of Al 2 O 3 layers on p-type CZ silicon wafers.
441 citations
"On the Charge Sheet Superjunction (..." refers background in this paper
...One can use Al2O3, which has a negative fixed charge at its interface with silicon [8], [9] as the insulator, the magnitude of this fixed charge ranges between −1 × 10(12) cm−2 to −1 × 10(13) cm−2 [8] and high aspect ratio trenches have been filled...
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