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Journal ArticleDOI

On the Charge Sheet Superjunction (CSSJ) MOSFET

21 Nov 2008-IEEE Transactions on Electron Devices (IEEE)-Vol. 55, Iss: 12, pp 3562-3568
TL;DR: In this paper, a simple analytical model is developed for the drain-source capacitance of the charge sheet superjunction (CSSJ) MOSFET, and the model is shown to apply to the Superjunction as well.
Abstract: This paper provides more insight into the operation of the charge sheet superjunction (CSSJ) proposed recently, whose specific on-resistance for a given breakdown voltage is even lower than that of a Superjunction (SJ). It is shown how the SJ and the CSSJ both evolve from a simple Gamma-shaped p+-n junction in which the heavily doped region surrounds the lightly doped region; the peak field in such a 2-D junction is less than that in a plane junction. The phenomena underlying the I- V and C -V characteristics of the CSSJ MOSFET are clarified with the help of charge and potential simulations. A simple analytical model is developed for the drain-source capacitance of the CSSJ MOSFET; the model is shown to apply to SJ MOSFET as well. It is argued that the insulator charges providing the charge sheet essential for CSSJ operation will not present the same reliability problems as those due to trapped charge in the gate insulator of small-signal MOSFETs; this is because the insulator field distribution in a CSSJ differs significantly from that in a small-signal MOSFET. The insight provided in this paper should build a strong motivation for the practical implementation of the new structure.
Citations
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Journal ArticleDOI
TL;DR: In this paper, a gate enhanced power UMOSFET (GE-UMOS) was proposed to decrease the specific on-resistance of the device, where the deep trench polysilicon electrode is contacted to the gate electrode, maintaining the breakdown voltage and forming the high electron current density at side n-drift region, thus resulting in a lower on -resistance compared to the superjunction structure and gradient oxide-bypassed (GOB) structure.
Abstract: Gate enhanced power UMOSFET (GE-UMOS) is proposed to decrease the specific on -resistance of the device. The key feature of this structure is that the deep trench polysilicon electrode is contacted to the gate electrode, maintaining the breakdown voltage and forming the high electron current density at side n-drift region, thus resulting in a lower on -resistance compared to the superjunction structure and gradient oxide-bypassed (GOB) structure. Furthermore, the performance of GE-UMOS is proved by comparing with the GOB-UMOS structure.

33 citations


Cites methods from "On the Charge Sheet Superjunction (..."

  • ...TO OVERCOME the tradeoff relationship between specific ON-state resistance (RON) and breakdown voltage (BV) in the ideal silicon device [1], a p-n superjunction (SJ) structure was proposed in lowering the RON without affecting the BV [2], [3]....

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Journal ArticleDOI
Jian Chen1, Weifeng Sun1, Long Zhang1, Jing Zhu1, Yanzhang Lin1 
TL;DR: Superjunction has arguably been the most creative and important concept in power device field Superjunction vertical diffused MOSFET (SJ VDMOS) has been commercialized and the research effort to l
Abstract: Superjunction has arguably been the most creative and important concept in power device field Superjunction vertical diffused MOSFET (SJ VDMOS) has been commercialized and the research effort to l

27 citations

Journal ArticleDOI
TL;DR: In this article, an optimized gate-enhanced (GE) power UMOSFET with split gate (SGE-UMOS) was proposed, which shows the reduction in specific on-state resistance (Rsp) at a breakdown voltage of 119 V as compared to the gradient oxide-bypassed (GOB) UMOS and GE-UMMS devices, which is due to the higher N-type concentration in the drift region.
Abstract: An optimized gate-enhanced (GE) power UMOSFET with split gate (SGE-UMOS) is proposed. This device shows the reduction in specific on-state resistance (Rsp) at a breakdown voltage of 119 V as compared to the gradient oxide-bypassed (GOB) UMOS and GE-UMOS devices, which is due to the higher N-type concentration in the drift region. In addition, the split-gate floating structure in SGE-UMOS also reduces the gate-source electrode parasitic capacitor. The numerical simulation results indicate that the proposed device features high performance with improved Rsp and Qg as compared to that of the GOB-UMOS and GE-UMOS devices.

20 citations


Cites background from "On the Charge Sheet Superjunction (..."

  • ...FOR OVERCOMING the difficulties of a p-n-superjunction (SJ) structure in a practical fabrication process, such as ideal p-n doping matching and small column width for a device below 300 V [1], [2], the gradient oxide-bypassed (GOB) structure was proposed to maintain fabrication simplicity....

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Journal ArticleDOI
TL;DR: In this paper, a simple device and electric circuit is proposed to measure the insulating properties of aluminum oxide and the transport properties of SnO2 as well, which indicate a fair insulation when four layers or Al2O3 are grown on the tin dioxide film, concomitant with thermal annealing.
Abstract: Aiming for the investigation of insulating properties of aluminum oxide (Al2O3) layers, as well as the combination of this oxide with tin dioxide (SnO2) for application in transparent field effect transistors, Al thin films are deposited by resistive evaporation on top of SnO2 thin films deposited by sol–gel dip-coating process. The oxidation of Al films to Al2O3 are carried out by thermal annealing at 500 °C in room conditions or oxygen atmosphere. X-ray diffraction data indicate that tetragonal Al2O3 is indeed obtained. A simple device and electric circuit is proposed to measure the insulating properties of aluminum oxide and the transport properties of SnO2 as well. Results indicate a fair insulation when four layers or Al2O3 are grown on the tin dioxide film, concomitant with thermal annealing between each layer. The current magnitude through the insulating layer is only 0.2% of the current through the semiconductor film, even though the conductivity of the SnO2 alone is not very high (the average resistivity is 2 Ω cm), because no doping is used. The presented results are a good indication that this combination may be useful for transparent devices.

14 citations

Journal ArticleDOI
TL;DR: In this paper, the authors presented the unique features exhibited by power 4H-SiC UMOSFET in which N and P type columns (NPC) in the drift region are incorporated to improve the breakdown voltage, the specific on-resistance, and the total lateral cell pitch.

9 citations

References
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Proceedings ArticleDOI
13 Dec 2004
TL;DR: In this paper, a comparative analysis of charge trapping in advanced metal gate/high-k stacks with EOT below 1 nm (corresponding to CETs, or T/sub inv/, in the 1.2-1.5 nm range) has been carried out.
Abstract: A comparative analysis of charge trapping in advanced metal gate/high-k stacks with EOT below 1 nm (corresponding to CETs, or T/sub inv/, in the 1.2-1.5 nm range) has been carried out. We investigate the effects of: (i) gate electrode material (namely, various metals vs. fully silicided gates (FUSI) vs. conventional poly-Si gates); (ii) high-k dielectric material (HfO/sub 2/, HfO/sub 2/:N, HfSiO, HfSiON, ZrO/sub 2/, Al/sub 2/O/sub 3/); (iii) high-k deposition technique (MOCVD vs. ALD); (iv) bottom interface; and (v) annealing effects, both postdeposition (PDA) and in a forming gas (FGA). Significant improvement of charge trapping in all Me-gate stacks has been consistently demonstrated. Based on this systematic analysis, we come to a conclusion that interaction(s) between the high-k layer and poly-Si plays a major role in charge trapping degradation.

12 citations


"On the Charge Sheet Superjunction (..." refers background in this paper

  • ...type of gate electrode [12], field conditions in and around...

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Proceedings ArticleDOI
11 Jun 2002
TL;DR: In this paper, the authors show that electron trap generation in the bulk of the Al/sub 2/O/sub 3/ films dominates, whereas hole trap near the Si substrate is observed for gate injection.
Abstract: Polarity-dependent charge trapping and defect generation have been observed in SiO/sub 2//Al/sub 2/O/sub 3/ gate stacks with TiN electrodes. For the substrate injection case, electron trapping in the bulk of the Al/sub 2/O/sub 3/ films dominates, whereas hole trap near the Si substrate is observed for gate injection. This asymmetry in defect creation causes an asymmetry in oxide reliability. For gate injection, reliability is limited by the thin SiO/sub 2/ interfacial layer, yielding low beta values, independent of the Al/sub 2/O/sub 3/ thickness. For substrate injection, reliability is limited by electron trap generation in the bulk of the Al/sub 2/O/sub 3/ film, yielding a strong thickness dependence of the beta values, as expected from the percolation model and as observed in SiO/sub 2/ layers of similar thickness.

9 citations

Proceedings ArticleDOI
01 Dec 2007
TL;DR: In this paper, a new superjunction concept called charge sheet super junction (CSSJ) is proposed based on simulation studies; a fabrication procedure for practical realization of this concept is also suggested.
Abstract: A new superjunction concept called Charge Sheet Superjunction (CSSJ) is proposed based on simulation studies; a fabrication procedure for practical realization of this concept is also suggested The CSSJ structure is obtained by replacing the p-pillar of a conventional Superjunction (SJ) by a negative charge sheet This structural modification minimizes the loss of conduction area to yield a lower specific on-resistance RONSP and tailors the 2-D field distribution so as to provide a slightly higher breakdown voltage VBR Simulations show that, as compared to a SJ, the CSSJ has ~30% lower RONSP for VBR = 300 V, and ~20 % lower VBR sensitivity to 20% charge imbalance for VBR = 500 V and RONSP ~5 mOmega- cm2 One way a negative charge sheet could be realized is by the replacement of the p-pillar of the SJ with a thin Al2O3 layer; the interface between Al2O3 and silicon has a negative fixed charge Thus, fabrication of a CSSJ avoids the complex process involved in the realization of alternate n- and p- pillars

6 citations


"On the Charge Sheet Superjunction (..." refers background or methods or result in this paper

  • ...a lower VDS than in the SJ MOSFET, because, as explained in our earlier work [2], full lateral depletion of the n-pillar in a CSSJ occurs at nearly half the value of VDS....

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  • ...According to the 2-D equation of the Gauss law, increased vertical spread of the equipotential lines is a consequence of more uniform lateral depletion of the pillar [5], which originates from the higher volume concentration of charges in the inversion layer of the CSSJ as compared to the p-pillar of an SJ [2]....

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  • ...We had recently proposed [2] the CSSJ which has nearly the same conduction area as a simple junction but higher breakdown voltage than the conventional SJ, whose conduction area is half of that of a simple junction....

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  • ...Our earlier work [2], presented numerical calculations of the...

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  • ...We had pointed in [2] that the VBR of CSSJ is higher than that of SJ....

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Journal ArticleDOI
S. Balaji1, Shreepad Karmalkar
TL;DR: In this article, the authors discussed various techniques in compensating the effects of oxide fixed charge so as to design such a device having the minimum specific on-resistance for a given breakdown voltage.
Abstract: This paper concerns superjunctions which employ oxide layers for isolating n- and p-pillars and in terminating the device. In our earlier work, we pointed out that oxide fixed charges significantly reduce the breakdown voltage of such devices. In this paper, we discuss various techniques in compensating the effects of oxide fixed charge so as to design such a device having the minimum specific on-resistance for a given breakdown voltage. The techniques include doping modification and reduction in the widths of terminating pillars and nonconducting pillars in the on-state. We also analyze the relative contributions of oxide fixed charges and doping-related charge imbalance to breakdown reduction to highlight the significance of oxide fixed charges.

4 citations


"On the Charge Sheet Superjunction (..." refers background in this paper

  • ...Experimental evidence for the lateral depletion of an SJ pillar by fixed charge of the insulator is already available in literature on SJ MOSFETs which employ silicon-dioxide layers between p- and n-pillars to prevent dopant interdiffusion [3]–[5]....

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  • ...However, note that fixed charge discussed in literature [3]–[5] was positive, unintentional, and detrimental to the device VBR....

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  • ...According to the 2-D equation of the Gauss law, increased vertical spread of the equipotential lines is a consequence of more uniform lateral depletion of the pillar [5], which originates from the higher volume concentration of charges in the inversion layer of the CSSJ as compared to the p-pillar of an SJ [2]....

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