On the fixed-point error analysis of several fast IDCT algorithms
01 Nov 1995-IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing (IEEE)-Vol. 42, Iss: 11, pp 685-693
TL;DR: In this article, a fixed-point error analysis for well-known fast l-D IDCT algorithms, such as Lee, Hou, and Vetterli, is presented.
Abstract: In this paper, a fixed-point error analysis for well-known fast l-D IDCT algorithms, such as Lee, Hou, and Vetterli, are presented. For a comparison purpose, a direct-form method is also included in our investigation. Based on the l-D analysis, the fixed-point error analysis of the row-column method and the Cho-Lee algorithm are also investigated for 2-D IDCT. Closed-form expressions for the rounding error variances are derived and compared with the experimental results. There is a close agreement between the theory and experiment, demonstrating that the analysis presented in this paper is valid. In addition, we also discuss the minimum word length to satisfy requirements for the implementation of 8/spl times/8 IDCT. >
Citations
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TL;DR: Fixed-point optimization utility software is developed that can aid scaling and wordlength determination of digital signal processing algorithms written in C or C++ and can be used to compare the fixed-point characteristics of different implementation architectures.
Abstract: Fixed-point optimization utility software is developed that can aid scaling and wordlength determination of digital signal processing algorithms written in C or C++. This utility consists of two programs: the range estimator and the fixed-point simulator. The former estimates the ranges of floating-point variables for purposes of automatic scaling, and the latter translates floating-point programs into fixed-point equivalents to evaluate the fixed-point performance by simulation. By exploiting the operator overloading characteristics of C++, the range estimation and the fixed-point simulation can be conducted by simply modifying the variable declaration of the original program. This utility is easily applicable to nearly all types of digital signal processing programs including nonlinear, time-varying, multirate, and multidimensional signal processing algorithms. In addition, this software can be used to compare the fixed-point characteristics of different implementation architectures. An optimization example for an 8/spl times/8 inverse discrete cosine transform (IDCT) architecture that conforms to the IEEE standard specifications is presented. The optimized results require 8% fewer gates when compared with the previous best implementation.
204 citations
Cites background from "On the fixed-point error analysis o..."
...There have been several studies to analyze the finite wordlength effects of several fast DCT/IDCT algorithms [18], [24], [25]....
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01 Jan 1998
TL;DR: This paper presents algorithmic level theory and optimization techniques to select distinct word lengths for each computation which meet the desired accuracy and minimize the design cost for the given performance constraints.
Abstract: In typical hardware implementations of an arithmetic-intensive algorithm, designers must determine the word lengths of resources such as adders, multipliers, and registers. This paper presents algorithmic level theory and optimization techniques to select distinct word lengths for each computation which meet the desired accuracy and minimize the design cost for the given performance constraints. The reduction in cost is possible by avoiding unnecessary bit-level computations that do not contribute significantly to the accuracy of the final results. Thus we have introduced a new optimization variable, computation accuracy, into data-path synthesis. Our results show on an average, a 30% reduction in functional-resource area using distinct word lengths as opposed to use of a single optimized word length for the entire algorithm.
69 citations
TL;DR: Complete fixed-point error models that include the coefficient quantization are derived for two popular 8/spl times/8 two-dimensional IDCT architectures; one is based on distributed arithmetic, and the other is the multiplier-adder chain.
Abstract: Complete fixed-point error models that include the coefficient quantization are derived for two popular 8/spl times/8 two-dimensional (2-D) IDCT architectures; one is based on distributed arithmetic, and the other is the multiplier-adder chain. The error models are evaluated in the integer domain to accurately measure the effects of rounding. The analysis results show that the overall mean-square error performance (OMSE) is the most critical condition for meeting the IEEE specification (IEEE Std. 1180-1990) when the rounding scheme is employed. On the other hand, the mean error effects (OME and PME) are dominant for truncation. Finally, the analysis results are compared with those of bit-accurate simulation.
37 citations
Cites background from "On the fixed-point error analysis o..."
...There have been a few studies on the fixed-point error modeling of several fast DCT/IDCT algorithms [2], [ 3 ]....
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01 Jan 2011
TL;DR: The proposed restructuring technique transforms the DCT algorithm into a cycle-convolution and a pseudo-cycle convolution structure as basic computational forms that leads to a ROM based VLSI kernel with good quantization properties.
Abstract: Using a specific input-restructuring sequence, a new VLSI algorithm and architecture have been derived for a high throughput memory-based systolic array VLSI implementation of a discrete cosine transform. The proposed restructuring technique transforms the DCT algorithm into a cycle-convolution and a pseudo-cycle convolution structure as basic computational forms. The proposed solution has been specially designed to have good fixed-point error performances that have been exploited to further reduce the hardware complexity and power consumption. It leads to a ROM based VLSI kernel with good quantization properties. A parallel VLSI algorithm and architecture with a good fixed point implementation appropriate for a memory-based implementation have been obtained. The proposed algorithm can bemapped onto two linear systolic arrays with similar length and form. They can be further efficientlymerged into a single array using an appropriate hardware sharing technique. A highly efficient VLSI chip can be thus obtained with appealing features as good architectural topology, processing speed, hardware complexity and I/O costs. Moreover, the proposed solution substantially reduces the hardware overhead involved by the pre-processing stage that for short length DCT consumes an important percentage of the chip area.
24 citations
01 Nov 1977
TL;DR: An efficient adaptive encoding technique using a new implementation of the Fast Discrete Cosine Transform (FDCT) for bandwidth compression of monochrome and color images is described, demonstrating excellent performance in terms of mean square error and direct comparison of original and reconstructed images.
Abstract: An efficient adaptive encoding technique using a new implementation of the Fast Discrete Cosine Transform (FDCT) for bandwidth compression of monochrome and color images is described. Practical system application is attained by maintaining a balance between complexity of implementation and performance. FDCT sub-blocks are sorted into four classes according to level of image activity, measured by the total ac energy within each sub-block. Adaptivity is provided by distributing bits between classes, favoring higher levels of activity over lower levels. Excellent performance is demonstrated in terms of mean square error and direct comparison of original and reconstructed images. Results are presented for both noiseless and noisy transmission at a total rate of 1 bit and 0.5 bit per pixel for a monochrome image and for a total rate of 2 bits and 1 bit per pixel for a color image. In every case the total bit rate includes all overhead required for image reconstruction and bit protection.
22 citations
References
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TL;DR: A new algorithm is introduced for the 2m-point discrete cosine transform that reduces the number of multiplications to about half of those required by the existing efficient algorithms, and it makes the system simpler.
Abstract: A new algorithm is introduced for the 2m-point discrete cosine transform. This algorithm reduces the number of multiplications to about half of those required by the existing efficient algorithms, and it makes the system simpler.
661 citations
"On the fixed-point error analysis o..." refers methods in this paper
...Among many proposed fast algorithms [I], three algorithms [ 2 ]-[4] are chosen for analysis....
[...]
TL;DR: In this article, an efficient adaptive encoding technique using a new implementation of the Fast Discrete Cosine Transform (FDCT) for bandwidth compression of monochrome and color images is described.
Abstract: An efficient adaptive encoding technique using a new implementation of the Fast Discrete Cosine Transform (FDCT) for bandwidth compression of monochrome and color images is described. Practical system application is attained by maintaining a balance between complexity of implementation and performance. FDCT sub-blocks are sorted into four classes according to level of image activity, measured by the total ac energy within each sub-block. Adaptivity is provided by distributing bits between classes, favoring higher levels of activity over lower levels. Excellent performance is demonstrated in terms of mean square error and direct comparison of original and reconstructed images. Results are presented for both noiseless and noisy transmission at a total rate of 1 bit and 0.5 bit per pixel for a monochrome image and for a total rate of 2 bits and 1 bit per pixel for a color image. In every case the total bit rate includes all overhead required for image reconstruction and bit protection.
509 citations
TL;DR: A simple algorithm for the evaluation of discrete Fourier transforms (DFT) and discrete cosine transforms (DCT) is presented, which achieves a substantial decrease in the number of additions when compared to currently used FFT algorithms.
366 citations
"On the fixed-point error analysis o..." refers methods in this paper
...Among many proposed fast algorithms [I], three algorithms [2]-[ 4 ] are chosen for analysis....
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...Similarly in [ 4 ], we shall refer to the real and imaginary part of IDFT as coslDFT and sinlDFT, respectively, and consider the fixedpoint error analysis for each calculation separately....
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...The principal objective of this paper is to provide the round-off error analysis of several well-known 1-D fast JDCT algorithms, namely 121-[ 4 ]....
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TL;DR: An algorithm for the fast computation of a 2-D discrete cosine transform (DCT) is presented and it is shown that the N*N DCT, where N=2/sup m/, can be computed using only N 1-D DCTs and additions, instead of using 2N 1-Ds as in the conventional row-column approach.
Abstract: An algorithm for the fast computation of a 2-D discrete cosine transform (DCT) is presented. It is shown that the N*N DCT, where N=2/sup m/, can be computed using only N 1-D DCTs and additions, instead of using 2N 1-D DCTs as in the conventional row-column approach. Hence the total number of multiplications for the proposed algorithm is only half of that required for the row-column approach and is also less than that of most of other fast algorithms, whereas the number of additions is almost comparable to that of others. It is also shown that only N/2 1-D DCT module are required for hardware parallel implementation of the proposed algorithm. Thus the number of actual multipliers being used is only a quarter of that required for the conventional approach. >
258 citations
TL;DR: A two-dimensional fast cosine transform algorithm (2-D FCT) is developed for 2m× 2ndata points, an extended version of the 1- D FCT algorithm introduced in a recent paper, but with significantly reduced computations for a 2-D field.
Abstract: A two-dimensional fast cosine transform algorithm (2-D FCT) is developed for 2m× 2ndata points. This algorithm is an extended version of the 1-D FCT algorithm introduced in a recent paper, but with significantly reduced computations for a 2-D field. The rationale for this 2-D FCT is a 2-D decomposition of data sequences into 2- D subblocks with reduced dimension (halves), rather than serial, one-dimensional, separable treatment for the columns and rows of the data sets. Computer simulation for the 2-D FCT algorithms, using a smaller block of data and finite word precision, proves to be excellent in comparison with the direct 2-D discrete cosine transform (2-D DCT). An example of a 4 × 4 2-D inverse fast cosine transform (2-D IFCT) algorithm development is presented in this paper, together with a signal flow graph.
146 citations