Oxide Semiconductor Thin‐Film Transistors: A Review of Recent Advances
TL;DR: The recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed andp-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed.
Abstract: Transparent electronics is today one of the most advanced topics for a wide range of device applications. The key components are wide bandgap semiconductors, where oxides of different origins play an important role, not only as passive component but also as active component, similar to what is observed in conventional semiconductors like silicon. Transparent electronics has gained special attention during the last few years and is today established as one of the most promising technologies for leading the next generation of flat panel display due to its excellent electronic performance. In this paper the recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed and p-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed. After a short introduction where the main advantages of these semiconductors are presented, as well as the industry expectations, the beautiful history of TFTs is revisited, including the main landmarks in the last 80 years, finishing by referring to some papers that have played an important role in shaping transparent electronics. Then, an overview is presented of state of the art n-type TFTs processed by physical vapour deposition methods, and finally one of the most exciting, promising, and low cost but powerful technologies is discussed: solution-processed oxide TFTs. Moreover, a more detailed focus analysis will be given concerning p-type oxide TFTs, mainly centred on two of the most promising semiconductor candidates: copper oxide and tin oxide. The most recent data related to the production of complementary metal oxide semiconductor (CMOS) devices based on n- and p-type oxide TFT is also be presented. The last topic of this review is devoted to some emerging applications, finalizing with the main conclusions. Related work that originated at CENIMAT|I3N during the last six years is included in more detail, which has led to the fabrication of high performance n- and p-type oxide transistors as well as the fabrication of CMOS devices with and on paper.
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TL;DR: In this article, an infrared annealing method was proposed for solution-processed indium gallium zinc oxide films, which exhibited a field effect mobility of 2.04 cm2 (Vs) −1, on-off current ratio of 1.52×106 and subthreshold swing of 0.84 V/dec.
Abstract: In this paper, an infrared annealing method was proposed for solution-processed indium gallium zinc oxide films. The optimized IGZO thin-film transistors (TFTs) exhibited a field-effect mobility of 2.04 cm2 (Vs)–1, on–off current ratio of 1.52×106 and subthreshold swing of 0.84 V/dec. Spectroscopic analysis confirmed that the infrared irradiation could enhance the removal of organic species and dehydroxylation. The results suggest that infrared annealing method is a potential process for low-temperature preparation of solution-processed oxide semiconductor layers and dielectric layers, and can be applied to the fabrication of TFT devices.
24 citations
TL;DR: In this article, the effects of oxygen-plasma treatment on solution-processed Al2Ox gate dielectrics for InGaZnOx (IGZO) thin film transistors (TFTs) are investigated.
Abstract: The effects of oxygen-plasma treatment on solution-processed Al2Ox gate dielectrics for InGaZnOx (IGZO) thin film transistors (TFTs) are investigated in this paper. Thin films of amorphous Al2Ox are successfully fabricated by annealing temperature of 300 °C. Utilizing oxygen-plasma treated gate dielectrics, combustion-processed IGZO TFTs, which are annealed at a temperature of 300 °C, show a mobility of 7.3 cm2 V−1 s−1, a threshold voltage of −0.3 V, an on-off current ratio of 1 × 105, a subthreshold swing of 160 mV/decade, when operating with a voltage ranging from −2 V to +5 V. Our experimental results demonstrate that oxygen-plasma treatment can remarkably improve dielectric performance. This is presumably due to the passivation of interfacial and bulk traps, and the reduced concentration of oxygen vacancies.
24 citations
TL;DR: The dual-layer channel TFT exhibits a low leakage current of 2.8Õ×10−13ÕA, Ion/Ioff ratio of 3.4 Õ×109, saturation mobility μsat of 12Õcm2ÕV−1Õ−1µs−1, subthreshold swing (SS) of 0.18 ÒV/decade after the annealing treatment in O2 due to the reduction of the trap states at the channel/dielectric interface and in the bulk channel layer as mentioned in this paper
24 citations
24 citations
Additional excerpts
...These are of critical importance for the development of displays and integrated circuits because p-n junctions and CMOS logic circuits enable fast response time, low heat generation, high circuit density, and low power consumption compared to the unipolar-type devices.(336) However, as shown in Figure 8, vacuum-processed ptype oxide TFTs have not been investigated much compared with their n-type oxide TFTs (since 2010, the proportion of papers on these are less than 10% of those on n-type)....
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TL;DR: It is shown that vertical arrays of NiO-NPs are potential candidates for nanoscale devices because they have a great impact on the local current transport mechanism due to its nanostructure morphology.
Abstract: The present work focuses on a qualitative analysis of localised I–V characteristics based on the nanostructure morphology of highly dense arrays of p-type NiO nano-pillars (NiO-NPs). Vertically aligned NiO-NPs have been grown on different substrates by using a glancing angle deposition (GLAD) technique. The preferred orientation of as grown NiO-NPs was controlled by the deposition pressure. The NiO-NPs displayed a polar surface with a microscopic dipole moment along the (111) plane (Tasker's type III). Consequently, the crystal plane dependent surface electron accumulation layer and the lattice disorder at the grain boundary interface showed a non-uniform current distribution throughout the sample surface, demonstrated by a conducting AFM technique (c-AFM). The variation in I–V for different points in a single current distribution grain (CD-grain) has been attributed to the variation of Schottky barrier height (SBH) at the metal–semiconductor (M–S) interface. Furthermore, we observed that the strain produced during the NiO-NPs growth can modulate the SBH. Inbound strain acts as an external field to influence the local electric field at the M–S interface causing a variation in SBH with the NPs orientation. This paper shows that vertical arrays of NiO-NPs are potential candidates for nanoscale devices because they have a great impact on the local current transport mechanism due to its nanostructure morphology.
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References
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TL;DR: A novel semiconducting material is proposed—namely, a transparent amorphous oxide semiconductor from the In-Ga-Zn-O system (a-IGZO)—for the active channel in transparent thin-film transistors (TTFTs), which are fabricated on polyethylene terephthalate sheets and exhibit saturation mobilities and device characteristics are stable during repetitive bending of the TTFT sheet.
Abstract: Transparent electronic devices formed on flexible substrates are expected to meet emerging technological demands where silicon-based electronics cannot provide a solution. Examples of active flexible applications include paper displays and wearable computers1. So far, mainly flexible devices based on hydrogenated amorphous silicon (a-Si:H)2,3,4,5 and organic semiconductors2,6,7,8,9,10 have been investigated. However, the performance of these devices has been insufficient for use as transistors in practical computers and current-driven organic light-emitting diode displays. Fabricating high-performance devices is challenging, owing to a trade-off between processing temperature and device performance. Here, we propose to solve this problem by using a novel semiconducting material—namely, a transparent amorphous oxide semiconductor from the In-Ga-Zn-O system (a-IGZO)—for the active channel in transparent thin-film transistors (TTFTs). The a-IGZO is deposited on polyethylene terephthalate at room temperature and exhibits Hall effect mobilities exceeding 10 cm2 V-1 s-1, which is an order of magnitude larger than for hydrogenated amorphous silicon. TTFTs fabricated on polyethylene terephthalate sheets exhibit saturation mobilities of 6–9 cm2 V-1 s-1, and device characteristics are stable during repetitive bending of the TTFT sheet.
7,301 citations
Book•
04 Jul 1990
TL;DR: In this article, the authors present a characterization of the resistivity of a two-point-versus-four-point probe in terms of the number of contacts and the amount of contacts in the probe.
Abstract: Preface to Third Edition. 1 Resistivity. 1.1 Introduction. 1.2 Two-Point Versus Four-Point Probe. 1.3 Wafer Mapping. 1.4 Resistivity Profiling. 1.5 Contactless Methods. 1.6 Conductivity Type. 1.7 Strengths and Weaknesses. Appendix 1.1 Resistivity as a Function of Doping Density. Appendix 1.2 Intrinsic Carrier Density. References. Problems. Review Questions. 2 Carrier and Doping Density. 2.1 Introduction. 2.2 Capacitance-Voltage (C-V). 2.3 Current-Voltage (I-V). 2.4 Measurement Errors and Precautions. 2.5 Hall Effect. 2.6 Optical Techniques. 2.7 Secondary Ion Mass Spectrometry (SIMS). 2.8 Rutherford Backscattering (RBS). 2.9 Lateral Profiling. 2.10 Strengths and Weaknesses. Appendix 2.1 Parallel or Series Connection? Appendix 2.2 Circuit Conversion. References. Problems. Review Questions. 3 Contact Resistance and Schottky Barriers. 3.1 Introduction. 3.2 Metal-Semiconductor Contacts. 3.3 Contact Resistance. 3.4 Measurement Techniques. 3.5 Schottky Barrier Height. 3.6 Comparison of Methods. 3.7 Strengths and Weaknesses. Appendix 3.1 Effect of Parasitic Resistance. Appendix 3.2 Alloys for Contacts to Semiconductors. References. Problems. Review Questions. 4 Series Resistance, Channel Length and Width, and Threshold Voltage. 4.1 Introduction. 4.2 PN Junction Diodes. 4.3 Schottky Barrier Diodes. 4.4 Solar Cells. 4.5 Bipolar Junction Transistors. 4.6 MOSFETS. 4.7 MESFETS and MODFETS. 4.8 Threshold Voltage. 4.9 Pseudo MOSFET. 4.10 Strengths and Weaknesses. Appendix 4.1 Schottky Diode Current-Voltage Equation. References. Problems. Review Questions. 5 Defects. 5.1 Introduction. 5.2 Generation-Recombination Statistics. 5.3 Capacitance Measurements. 5.4 Current Measurements. 5.5 Charge Measurements. 5.6 Deep-Level Transient Spectroscopy (DLTS). 5.7 Thermally Stimulated Capacitance and Current. 5.8 Positron Annihilation Spectroscopy (PAS). 5.9 Strengths and Weaknesses. Appendix 5.1 Activation Energy and Capture Cross-Section. Appendix 5.2 Time Constant Extraction. Appendix 5.3 Si and GaAs Data. References. Problems. Review Questions. 6 Oxide and Interface Trapped Charges, Oxide Thickness. 6.1 Introduction. 6.2 Fixed, Oxide Trapped, and Mobile Oxide Charge. 6.3 Interface Trapped Charge. 6.4 Oxide Thickness. 6.5 Strengths and Weaknesses. Appendix 6.1 Capacitance Measurement Techniques. Appendix 6.2 Effect of Chuck Capacitance and Leakage Current. References. Problems. Review Questions. 7 Carrier Lifetimes. 7.1 Introduction. 7.2 Recombination Lifetime/Surface Recombination Velocity. 7.3 Generation Lifetime/Surface Generation Velocity. 7.4 Recombination Lifetime-Optical Measurements. 7.5 Recombination Lifetime-Electrical Measurements. 7.6 Generation Lifetime-Electrical Measurements. 7.7 Strengths and Weaknesses. Appendix 7.1 Optical Excitation. Appendix 7.2 Electrical Excitation. References. Problems. Review Questions. 8 Mobility. 8.1 Introduction. 8.2 Conductivity Mobility. 8.3 Hall Effect and Mobility. 8.4 Magnetoresistance Mobility. 8.5 Time-of-Flight Drift Mobility. 8.6 MOSFET Mobility. 8.7 Contactless Mobility. 8.8 Strengths and Weaknesses. Appendix 8.1 Semiconductor Bulk Mobilities. Appendix 8.2 Semiconductor Surface Mobilities. Appendix 8.3 Effect of Channel Frequency Response. Appendix 8.4 Effect of Interface Trapped Charge. References. Problems. Review Questions. 9 Charge-based and Probe Characterization. 9.1 Introduction. 9.2 Background. 9.3 Surface Charging. 9.4 The Kelvin Probe. 9.5 Applications. 9.6 Scanning Probe Microscopy (SPM). 9.7 Strengths and Weaknesses. References. Problems. Review Questions. 10 Optical Characterization. 10.1 Introduction. 10.2 Optical Microscopy. 10.3 Ellipsometry. 10.4 Transmission. 10.5 Reflection. 10.6 Light Scattering. 10.7 Modulation Spectroscopy. 10.8 Line Width. 10.9 Photoluminescence (PL). 10.10 Raman Spectroscopy. 10.11 Strengths and Weaknesses. Appendix 10.1 Transmission Equations. Appendix 10.2 Absorption Coefficients and Refractive Indices for Selected Semiconductors. References. Problems. Review Questions. 11 Chemical and Physical Characterization. 11.1 Introduction. 11.2 Electron Beam Techniques. 11.3 Ion Beam Techniques. 11.4 X-Ray and Gamma-Ray Techniques. 11.5 Strengths and Weaknesses. Appendix 11.1 Selected Features of Some Analytical Techniques. References. Problems. Review Questions. 12 Reliability and Failure Analysis. 12.1 Introduction. 12.2 Failure Times and Acceleration Factors. 12.3 Distribution Functions. 12.4 Reliability Concerns. 12.5 Failure Analysis Characterization Techniques. 12.6 Strengths and Weaknesses. Appendix 12.1 Gate Currents. References. Problems. Review Questions. Appendix 1 List of Symbols. Appendix 2 Abbreviations and Acronyms. Index.
6,573 citations
TL;DR: In this paper, a review of the literature in the area of alternate gate dielectrics is given, based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success.
Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...
5,711 citations
IBM1
TL;DR: In this article, the authors present new insight into conduction mechanisms and performance characteristics, as well as opportunities for modeling properties of organic thin-film transistors (OTFTs) and discuss progress in the growing field of n-type OTFTs.
Abstract: Organic thin-film transistors (OTFTs) have lived to see great improvements in recent years. This review presents new insight into conduction mechanisms and performance characteristics, as well as opportunities for modeling properties of OTFTs. The shifted focus in research from novel chemical structures to fabrication technologies that optimize morphology and structural order is underscored by chapters on vacuum-deposited and solution-processed organic semiconducting films. Finally, progress in the growing field of the n-type OTFTs is discussed in ample detail. The Figure, showing a pentacene film edge on SiO2, illustrates the morphology issue.
4,804 citations
TL;DR: An outlook is presented on what will be required to drive this young photovoltaic technology towards the next major milestone, a 10% power conversion efficiency, considered by many to represent the efficiency at which OPV can be adopted in wide-spread applications.
Abstract: Solution-processed bulk-heterojunction solar cells have gained serious attention during the last few years and are becoming established as one of the future photovoltaic technologies for low-cost power production. This article reviews the highlights of the last few years, and summarizes today's state-of-the-art performance. An outlook is given on relevant future materials and technologies that have the potential to guide this young photovoltaic technology towards the magic 10% regime. A cost model supplements the technical discussions, with practical aspects any photovoltaic technology needs to fulfil, and answers to the question as to whether low module costs can compensate lower lifetimes and performances.
3,084 citations