Oxide Semiconductor Thin‐Film Transistors: A Review of Recent Advances
TL;DR: The recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed andp-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed.
Abstract: Transparent electronics is today one of the most advanced topics for a wide range of device applications. The key components are wide bandgap semiconductors, where oxides of different origins play an important role, not only as passive component but also as active component, similar to what is observed in conventional semiconductors like silicon. Transparent electronics has gained special attention during the last few years and is today established as one of the most promising technologies for leading the next generation of flat panel display due to its excellent electronic performance. In this paper the recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed and p-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed. After a short introduction where the main advantages of these semiconductors are presented, as well as the industry expectations, the beautiful history of TFTs is revisited, including the main landmarks in the last 80 years, finishing by referring to some papers that have played an important role in shaping transparent electronics. Then, an overview is presented of state of the art n-type TFTs processed by physical vapour deposition methods, and finally one of the most exciting, promising, and low cost but powerful technologies is discussed: solution-processed oxide TFTs. Moreover, a more detailed focus analysis will be given concerning p-type oxide TFTs, mainly centred on two of the most promising semiconductor candidates: copper oxide and tin oxide. The most recent data related to the production of complementary metal oxide semiconductor (CMOS) devices based on n- and p-type oxide TFT is also be presented. The last topic of this review is devoted to some emerging applications, finalizing with the main conclusions. Related work that originated at CENIMAT|I3N during the last six years is included in more detail, which has led to the fabrication of high performance n- and p-type oxide transistors as well as the fabrication of CMOS devices with and on paper.
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TL;DR: In this paper, an Ar/O2 plasma mixture treatment with different proportions of O2 was used to reduce the oxygen vacancy density in an amorphous indium gallium zinc oxide (a-IGZO) thin film.
Abstract: In this study, an Ar/O2 plasma mixture treatment with different proportions of O2 was used to reduce the oxygen vacancy density in an amorphous indium gallium zinc oxide (a-IGZO) thin film. The objective was to enhance the field-effect carrier mobility in a thin-film transistor (TFT) with the IGZO film as the channel layer. Atomic force microscopy revealed that the roughness of the IGZO film after plasma treatment was higher than that of the untreated film; however, the surface roughness of the IGZO film decreased after the proportion of O2 was increased in the plasma. The Hall measurement results showed that the resistivity of the plasma-treated IGZO film increased with a decrease in the electron concentration in the film; in addition, the carrier mobility considerably increased. The IGZO TFT fabricated from this film exhibited a high field-effect carrier mobility of 36 cm2 V−1 s−1, a subthreshold swing (SS) of 1.25 V/decade, an I OFF current of 4.58 × 10−11 A, and an I ON/I OFF current ratio of 7.55 × 105. To further improve the device performance, the plasma-treated IGZO films were subjected to thermal annealing with the annealing temperature ranging from 100 °C to 300 °C. After the annealing process, the plasma-treated IGZO TFTs demonstrated a further improvement in the device performance with a field-effect carrier mobility of 38.8 cm2 V−1 s−1, SS of 0.7 V/decade, I OFF current of 1.04 × 10−11 A, and an I ON/I OFF current ratio of 9.93 × 106. In addition, a reliability test was performed to evaluate the stability of the IGZO TFT devices, which revealed that the threshold voltage maintained a high degree of stability during the long-term tests. Therefore, the plasma-treated IGZO TFTs with subsequent postgrowth annealing could be helpful for the fabrication of next-generation flat-panel displays.
8 citations
TL;DR: In this paper, a hybrid thin-film transistors using polyvinylphenol (PVP) as the polymer dielectric gate is presented, which exhibits superior performance with a low threshold voltage of 0.3 V, a subthreshold slope 0.25 V/dec, and a high mobility 36.1 cm.
Abstract: In this letter, we fabricated cadmium sulfide (CdS)-based hybrid thin-film transistors (TFTs) using Poly(vinylphenol) (PVP) as the polymer dielectric gate. The synthesis of PVP crosslinked with trimethoxy propyl silane was made by solution processing, and the films were deposited by a dip-coating technique. The PVP films were cured at 200 °C after deposition, which was the highest temperature for the devices processing. The CdS films were deposited at room temperature using a UV photo-assisted chemical bath deposition technique. These dielectric layers have low leakage current density (10−8 A/cm2) and a high dielectric constant of 4.7 at 1 kHz. The TFTs exhibited superior performance with a low threshold voltage of 0.3 V, ${I}_{ \mathrm{\scriptscriptstyle ON}/ \mathrm{\scriptscriptstyle OFF}}$ current ratio of 105, subthreshold slope 0.25 V/dec, and a high mobility 36.1 cm $^{\textsf {2}}\text{V}^{-\textsf {1}}\text{s}^{-\textsf {1}}$ at operating voltages less than 3 V.
8 citations
TL;DR: The atmospheric-pressure plasma (APP) treatment technique provides a new opportunity to effectively improve the electrical performance of solution-processed dielectrics in the atmosphere at low temperature.
Abstract: We present an atmospheric-pressure plasma (APP) treatment technique to improve the electrical performance of solution-processed dielectric films. This technique can successfully reduce leakage current and frequency dependence of solution-processed dielectric films. The APP treatment contributes to the conversion of metal hydroxide to metal oxide, and in the case of a solution-treated AlO x dielectric thin film, it effectively ascribes to the formation of high-quality AlO x dielectric thin films. The capacitance of the untreated AlO x dielectric thin film varies up to 9.9% with frequency change, but the capacitance of the APP treated AlO x dielectric thin film varies within 1.5%. When the solution-processed InO x thin-film transistors (TFTs) were fabricated using these dielectric films, the field-effect mobility of TFTs with the APP-treated AlO x dielectric film was increased significantly from 9.77 to 26.79 cm2 V-1 s-1 in comparison to that of TFTs with the untreated AlO x dielectric film. We also have confirmed that these results are similar to the properties of the sample prepared at high annealing temperature including electrical performance, conduction mechanism and chemical structure. The APP treatment technique provides a new opportunity to effectively improve the electrical performance of solution-processed dielectrics in the atmosphere at low temperature.
8 citations
TL;DR: In this paper, the threshold voltage of the EGT, which determines the operation mode, is tuned through sizing of EGTs channel geometry, and the feasibility of both transistor operation modes is demonstrated for logic gates and ring oscillators.
Abstract: Electrolyte-gated thin-film transistors (EGTs) with indium oxide channel, and expected lifetime of three months, enable low-voltage operation (~1 V) in the field of printed electronics (PEs). The channel width of our printed EGTs is varied between 200 and 1000 $\mu \text {m}$ , whereas a channel length between 10 and 100 $\mu \text {m}$ is used. Due to the lack of uniform performance p-type metal oxide semiconductors, n-type EGTs and passive elements are used to design circuits. For logic gates, transistor–resistor logic has been employed so far, but depletion- and enhancement-mode EGTs in a transistor–transistor logic boost the circuit performance in terms of delay and signal swing. In this article, the threshold voltage of the EGT, which determines the operation mode, is tuned through sizing of the EGTs channel geometry. The feasibility of both transistor operation modes is demonstrated for logic gates and ring oscillators. An inverter operating at a supply voltage of 1 V shows a maximum gain of 9.6 and a propagation delay time of 0.7 ms, which represents an improvement of $\sim \!2\times $ for the gain and oscillation frequency, in comparison with the resistor–transistor logic design. Moreover, the power consumption is reduced by 6 $\times $ .
8 citations
TL;DR: In this paper, a-IGZO:Mg/H TFT with field effect mobility of 35.6 cm2/Vs, lowsub-threshold swing of 0.21 V/dec, high $\text{I}_{{\text {on}}}/\text{ I}_{\text {off}}$ of 108, and small threshold voltage ( $V_{''text {th}}$ ) of0.5 V was obtained.
Abstract: In this work, the hydrogenation (H) of Mg-doped amorphous InGaZnO (a-IGZO:Mg/H) thin-film transistors (TFTs) was fabricated via RF sputtering method. As a consequence, the a- IGZO:Mg/H TFT with field-effectmobility of 35.6 cm2/Vs, lowsub-threshold swing of 0.21 V/dec, high $\text{I}_{{\text {on}}}/\text{I}_{\text {off}}$ of 108, andsmall threshold voltage ( $V_{\text {th}}$ ) of 0.5 V was obtained. In addition, the a- IGZO:Mg/H TFT exhibits the best stability for small $V_{\text {th}}$ shifts of 1.5 (−1.7) V, 2.6 (−2.8) V, and 3.5 (−3.6) V under the conditions of gate bias, light illumination, and the temperature stress test. The X-ray photo-electron spectroscopy band structure and oxygen vacancy ( $V_{\text {O}}$ ) analysis indicate that the enhanced performance and stability are owing to the appropriate Mg/H co-doping concentration. This is because the Mg/H co-doped not only controlled the carrier concentration, but also reduced $V_{\text {O}}$ and interface trap density. Overall, the optimized Mg/H co-doped a-IGZO TFTs have provided an effective pathway to achieve high-performance oxide TFTs with superior stability.
8 citations
References
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TL;DR: A novel semiconducting material is proposed—namely, a transparent amorphous oxide semiconductor from the In-Ga-Zn-O system (a-IGZO)—for the active channel in transparent thin-film transistors (TTFTs), which are fabricated on polyethylene terephthalate sheets and exhibit saturation mobilities and device characteristics are stable during repetitive bending of the TTFT sheet.
Abstract: Transparent electronic devices formed on flexible substrates are expected to meet emerging technological demands where silicon-based electronics cannot provide a solution. Examples of active flexible applications include paper displays and wearable computers1. So far, mainly flexible devices based on hydrogenated amorphous silicon (a-Si:H)2,3,4,5 and organic semiconductors2,6,7,8,9,10 have been investigated. However, the performance of these devices has been insufficient for use as transistors in practical computers and current-driven organic light-emitting diode displays. Fabricating high-performance devices is challenging, owing to a trade-off between processing temperature and device performance. Here, we propose to solve this problem by using a novel semiconducting material—namely, a transparent amorphous oxide semiconductor from the In-Ga-Zn-O system (a-IGZO)—for the active channel in transparent thin-film transistors (TTFTs). The a-IGZO is deposited on polyethylene terephthalate at room temperature and exhibits Hall effect mobilities exceeding 10 cm2 V-1 s-1, which is an order of magnitude larger than for hydrogenated amorphous silicon. TTFTs fabricated on polyethylene terephthalate sheets exhibit saturation mobilities of 6–9 cm2 V-1 s-1, and device characteristics are stable during repetitive bending of the TTFT sheet.
7,301 citations
Book•
04 Jul 1990
TL;DR: In this article, the authors present a characterization of the resistivity of a two-point-versus-four-point probe in terms of the number of contacts and the amount of contacts in the probe.
Abstract: Preface to Third Edition. 1 Resistivity. 1.1 Introduction. 1.2 Two-Point Versus Four-Point Probe. 1.3 Wafer Mapping. 1.4 Resistivity Profiling. 1.5 Contactless Methods. 1.6 Conductivity Type. 1.7 Strengths and Weaknesses. Appendix 1.1 Resistivity as a Function of Doping Density. Appendix 1.2 Intrinsic Carrier Density. References. Problems. Review Questions. 2 Carrier and Doping Density. 2.1 Introduction. 2.2 Capacitance-Voltage (C-V). 2.3 Current-Voltage (I-V). 2.4 Measurement Errors and Precautions. 2.5 Hall Effect. 2.6 Optical Techniques. 2.7 Secondary Ion Mass Spectrometry (SIMS). 2.8 Rutherford Backscattering (RBS). 2.9 Lateral Profiling. 2.10 Strengths and Weaknesses. Appendix 2.1 Parallel or Series Connection? Appendix 2.2 Circuit Conversion. References. Problems. Review Questions. 3 Contact Resistance and Schottky Barriers. 3.1 Introduction. 3.2 Metal-Semiconductor Contacts. 3.3 Contact Resistance. 3.4 Measurement Techniques. 3.5 Schottky Barrier Height. 3.6 Comparison of Methods. 3.7 Strengths and Weaknesses. Appendix 3.1 Effect of Parasitic Resistance. Appendix 3.2 Alloys for Contacts to Semiconductors. References. Problems. Review Questions. 4 Series Resistance, Channel Length and Width, and Threshold Voltage. 4.1 Introduction. 4.2 PN Junction Diodes. 4.3 Schottky Barrier Diodes. 4.4 Solar Cells. 4.5 Bipolar Junction Transistors. 4.6 MOSFETS. 4.7 MESFETS and MODFETS. 4.8 Threshold Voltage. 4.9 Pseudo MOSFET. 4.10 Strengths and Weaknesses. Appendix 4.1 Schottky Diode Current-Voltage Equation. References. Problems. Review Questions. 5 Defects. 5.1 Introduction. 5.2 Generation-Recombination Statistics. 5.3 Capacitance Measurements. 5.4 Current Measurements. 5.5 Charge Measurements. 5.6 Deep-Level Transient Spectroscopy (DLTS). 5.7 Thermally Stimulated Capacitance and Current. 5.8 Positron Annihilation Spectroscopy (PAS). 5.9 Strengths and Weaknesses. Appendix 5.1 Activation Energy and Capture Cross-Section. Appendix 5.2 Time Constant Extraction. Appendix 5.3 Si and GaAs Data. References. Problems. Review Questions. 6 Oxide and Interface Trapped Charges, Oxide Thickness. 6.1 Introduction. 6.2 Fixed, Oxide Trapped, and Mobile Oxide Charge. 6.3 Interface Trapped Charge. 6.4 Oxide Thickness. 6.5 Strengths and Weaknesses. Appendix 6.1 Capacitance Measurement Techniques. Appendix 6.2 Effect of Chuck Capacitance and Leakage Current. References. Problems. Review Questions. 7 Carrier Lifetimes. 7.1 Introduction. 7.2 Recombination Lifetime/Surface Recombination Velocity. 7.3 Generation Lifetime/Surface Generation Velocity. 7.4 Recombination Lifetime-Optical Measurements. 7.5 Recombination Lifetime-Electrical Measurements. 7.6 Generation Lifetime-Electrical Measurements. 7.7 Strengths and Weaknesses. Appendix 7.1 Optical Excitation. Appendix 7.2 Electrical Excitation. References. Problems. Review Questions. 8 Mobility. 8.1 Introduction. 8.2 Conductivity Mobility. 8.3 Hall Effect and Mobility. 8.4 Magnetoresistance Mobility. 8.5 Time-of-Flight Drift Mobility. 8.6 MOSFET Mobility. 8.7 Contactless Mobility. 8.8 Strengths and Weaknesses. Appendix 8.1 Semiconductor Bulk Mobilities. Appendix 8.2 Semiconductor Surface Mobilities. Appendix 8.3 Effect of Channel Frequency Response. Appendix 8.4 Effect of Interface Trapped Charge. References. Problems. Review Questions. 9 Charge-based and Probe Characterization. 9.1 Introduction. 9.2 Background. 9.3 Surface Charging. 9.4 The Kelvin Probe. 9.5 Applications. 9.6 Scanning Probe Microscopy (SPM). 9.7 Strengths and Weaknesses. References. Problems. Review Questions. 10 Optical Characterization. 10.1 Introduction. 10.2 Optical Microscopy. 10.3 Ellipsometry. 10.4 Transmission. 10.5 Reflection. 10.6 Light Scattering. 10.7 Modulation Spectroscopy. 10.8 Line Width. 10.9 Photoluminescence (PL). 10.10 Raman Spectroscopy. 10.11 Strengths and Weaknesses. Appendix 10.1 Transmission Equations. Appendix 10.2 Absorption Coefficients and Refractive Indices for Selected Semiconductors. References. Problems. Review Questions. 11 Chemical and Physical Characterization. 11.1 Introduction. 11.2 Electron Beam Techniques. 11.3 Ion Beam Techniques. 11.4 X-Ray and Gamma-Ray Techniques. 11.5 Strengths and Weaknesses. Appendix 11.1 Selected Features of Some Analytical Techniques. References. Problems. Review Questions. 12 Reliability and Failure Analysis. 12.1 Introduction. 12.2 Failure Times and Acceleration Factors. 12.3 Distribution Functions. 12.4 Reliability Concerns. 12.5 Failure Analysis Characterization Techniques. 12.6 Strengths and Weaknesses. Appendix 12.1 Gate Currents. References. Problems. Review Questions. Appendix 1 List of Symbols. Appendix 2 Abbreviations and Acronyms. Index.
6,573 citations
TL;DR: In this paper, a review of the literature in the area of alternate gate dielectrics is given, based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success.
Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...
5,711 citations
IBM1
TL;DR: In this article, the authors present new insight into conduction mechanisms and performance characteristics, as well as opportunities for modeling properties of organic thin-film transistors (OTFTs) and discuss progress in the growing field of n-type OTFTs.
Abstract: Organic thin-film transistors (OTFTs) have lived to see great improvements in recent years. This review presents new insight into conduction mechanisms and performance characteristics, as well as opportunities for modeling properties of OTFTs. The shifted focus in research from novel chemical structures to fabrication technologies that optimize morphology and structural order is underscored by chapters on vacuum-deposited and solution-processed organic semiconducting films. Finally, progress in the growing field of the n-type OTFTs is discussed in ample detail. The Figure, showing a pentacene film edge on SiO2, illustrates the morphology issue.
4,804 citations
TL;DR: An outlook is presented on what will be required to drive this young photovoltaic technology towards the next major milestone, a 10% power conversion efficiency, considered by many to represent the efficiency at which OPV can be adopted in wide-spread applications.
Abstract: Solution-processed bulk-heterojunction solar cells have gained serious attention during the last few years and are becoming established as one of the future photovoltaic technologies for low-cost power production. This article reviews the highlights of the last few years, and summarizes today's state-of-the-art performance. An outlook is given on relevant future materials and technologies that have the potential to guide this young photovoltaic technology towards the magic 10% regime. A cost model supplements the technical discussions, with practical aspects any photovoltaic technology needs to fulfil, and answers to the question as to whether low module costs can compensate lower lifetimes and performances.
3,084 citations