Oxide Semiconductor Thin‐Film Transistors: A Review of Recent Advances
TL;DR: The recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed andp-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed.
Abstract: Transparent electronics is today one of the most advanced topics for a wide range of device applications. The key components are wide bandgap semiconductors, where oxides of different origins play an important role, not only as passive component but also as active component, similar to what is observed in conventional semiconductors like silicon. Transparent electronics has gained special attention during the last few years and is today established as one of the most promising technologies for leading the next generation of flat panel display due to its excellent electronic performance. In this paper the recent progress in n- and p-type oxide based thin-film transistors (TFT) is reviewed, with special emphasis on solution-processed and p-type, and the major milestones already achieved with this emerging and very promising technology are summarizeed. After a short introduction where the main advantages of these semiconductors are presented, as well as the industry expectations, the beautiful history of TFTs is revisited, including the main landmarks in the last 80 years, finishing by referring to some papers that have played an important role in shaping transparent electronics. Then, an overview is presented of state of the art n-type TFTs processed by physical vapour deposition methods, and finally one of the most exciting, promising, and low cost but powerful technologies is discussed: solution-processed oxide TFTs. Moreover, a more detailed focus analysis will be given concerning p-type oxide TFTs, mainly centred on two of the most promising semiconductor candidates: copper oxide and tin oxide. The most recent data related to the production of complementary metal oxide semiconductor (CMOS) devices based on n- and p-type oxide TFT is also be presented. The last topic of this review is devoted to some emerging applications, finalizing with the main conclusions. Related work that originated at CENIMAT|I3N during the last six years is included in more detail, which has led to the fabrication of high performance n- and p-type oxide transistors as well as the fabrication of CMOS devices with and on paper.
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Journal Article•
43 citations
TL;DR: In this article, two-step annealing, high temperature and sequent low temperature, for amorphous indium-gallium-zincoxide (a-IGZO) thin-film transistor (TFT) is reported.
Abstract: We report two-step annealing, high temperature and sequent low temperature, for amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) to improve its stability and device performance. The annealing is carried out at 300 oC in N2 ambient for 1 h (1st step annealing) and then at 250 oC in vacuum for 10 h (2nd step annealing). It is found that the threshold voltage (VTH) changes from 0.4 V to -2.0 V by the 1st step annealing and to +0.6 V by 2nd step annealing. The mobility changes from 18 cm2V-1s-1 to 25 cm2V-1s-1 by 1st step and decreases to 20 cm2V-1s-1 by 2nd step annealing. The VTH shift by positive bias temperature stress (PBTS) is 3.7 V for the as-prepared TFT, and 1.7 V for the 1st step annealed TFT, and 1.3 V for the 2nd step annealed TFT. The XPS (X-ray photoelectron spectroscopy) depth analysis indicates that the reduction in O-H bonds at the top interface (SiO2/a-IGZO) by 2nd step annealing appears, which is related to the positive VTH shift and smaller VTH shift by PBTS.
43 citations
TL;DR: In this article, an eco-friendly spin-coating process using ethanol and water as solvents was used to synthesize amorphous indium-tungsten oxide (IWO) semiconductor thin films.
Abstract: In this study, amorphous indium-tungsten oxide (IWO) semiconductor thin films were prepared by an eco-friendly spin-coating process using ethanol and water as solvents. The electrical properties of IWO thin-film transistors (TFTs), together with the structural and morphological characteristics of IWO thin films, were systematically investigated as functions of tungsten concentration and annealing temperature. The optimized IWO channel layer was then integrated on an aqueous aluminum oxide (AlOx) gate dielectric. It is observed that the solution-processed IWO/AlOx TFT presents high stability and improved characteristics, such as an on/off current ratio of 5 × 107, a field-effect mobility of 15.3 cm2 V−1 s−1, a small subthreshold slope of 68 mV dec−1, and a threshold voltage shift of 0.15 V under bias stress for 2 h. The IWO/AlOx TFT could be operated at a low voltage of 2 V, which was 15 times lower than that of conventional SiO2-based devices. The solution-processed IWO thin films synthesized in a green route would be promising candidates for large-area and high-performance low-cost devices.
43 citations
TL;DR: This is the first work demonstrating the low-voltage transistors based on p-type oxide NWs, which represents a great step toward the development of sensors and CMOS logic circuits.
Abstract: One-dimensional metal-oxide nanowires are regarded as important building blocks in nanoscale electronics, because of their unique mechanical and electrical properties. In this work, p-type nickel oxide nanowires (NiO NWs) were fabricated by combining sol–gel and electrospinning processes. The poly(vinylpyrrolidone) (PVP) with a molecular weight of 1 300 000 was used as the polymer matrix to increase the viscosity of a NiO precursor solution. The formation and properties of the as-spun NiO/PVP composite NWs before/after calcination treatment were investigated using various techniques. Because of the enhanced adhesion properties between ultraviolet (UV)-treated NiO NWs and the substrate, the field-effect transistors (FETs) based on NiO NWs were found to exhibit satisfying p-channel behaviors. For the fabrication of aligned NiO NW arrays, two parallel conducting Si strips were grounded as NW collector. The integrated FETs based on aligned NiO NWs were demonstrated to exhibit superior electrical performance, ...
43 citations
TL;DR: In this paper, solution-based oxide gate dielectric layers are prepared from metal nitrates using UV-assisted annealing at 150 °C and the leakage current densities of ZrO2 and Al2O3 dielectrics are less than about 10-9 A/cm2 at 1 MV/cm.
Abstract: Solution-based oxide gate dielectric layers are prepared from metal nitrates using UV-assisted annealing at 150 °C. The leakage current densities of ZrO2 and Al2O3 dielectrics are less than about 10-9 A/cm2 at 1 MV/cm and comparable to those formed by annealing at higher temperatures. High dielectric constants and the low leakage current behavior of the dielectric layers provide excellent ZnO TFT performance, with a field effect mobility of 1.37 cm2/V.s and an off-current density of 10-12 A/cm2. This low fabrication temperature process is compatible with future plastic electronics technology.
43 citations
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TL;DR: A novel semiconducting material is proposed—namely, a transparent amorphous oxide semiconductor from the In-Ga-Zn-O system (a-IGZO)—for the active channel in transparent thin-film transistors (TTFTs), which are fabricated on polyethylene terephthalate sheets and exhibit saturation mobilities and device characteristics are stable during repetitive bending of the TTFT sheet.
Abstract: Transparent electronic devices formed on flexible substrates are expected to meet emerging technological demands where silicon-based electronics cannot provide a solution. Examples of active flexible applications include paper displays and wearable computers1. So far, mainly flexible devices based on hydrogenated amorphous silicon (a-Si:H)2,3,4,5 and organic semiconductors2,6,7,8,9,10 have been investigated. However, the performance of these devices has been insufficient for use as transistors in practical computers and current-driven organic light-emitting diode displays. Fabricating high-performance devices is challenging, owing to a trade-off between processing temperature and device performance. Here, we propose to solve this problem by using a novel semiconducting material—namely, a transparent amorphous oxide semiconductor from the In-Ga-Zn-O system (a-IGZO)—for the active channel in transparent thin-film transistors (TTFTs). The a-IGZO is deposited on polyethylene terephthalate at room temperature and exhibits Hall effect mobilities exceeding 10 cm2 V-1 s-1, which is an order of magnitude larger than for hydrogenated amorphous silicon. TTFTs fabricated on polyethylene terephthalate sheets exhibit saturation mobilities of 6–9 cm2 V-1 s-1, and device characteristics are stable during repetitive bending of the TTFT sheet.
7,301 citations
Book•
04 Jul 1990
TL;DR: In this article, the authors present a characterization of the resistivity of a two-point-versus-four-point probe in terms of the number of contacts and the amount of contacts in the probe.
Abstract: Preface to Third Edition. 1 Resistivity. 1.1 Introduction. 1.2 Two-Point Versus Four-Point Probe. 1.3 Wafer Mapping. 1.4 Resistivity Profiling. 1.5 Contactless Methods. 1.6 Conductivity Type. 1.7 Strengths and Weaknesses. Appendix 1.1 Resistivity as a Function of Doping Density. Appendix 1.2 Intrinsic Carrier Density. References. Problems. Review Questions. 2 Carrier and Doping Density. 2.1 Introduction. 2.2 Capacitance-Voltage (C-V). 2.3 Current-Voltage (I-V). 2.4 Measurement Errors and Precautions. 2.5 Hall Effect. 2.6 Optical Techniques. 2.7 Secondary Ion Mass Spectrometry (SIMS). 2.8 Rutherford Backscattering (RBS). 2.9 Lateral Profiling. 2.10 Strengths and Weaknesses. Appendix 2.1 Parallel or Series Connection? Appendix 2.2 Circuit Conversion. References. Problems. Review Questions. 3 Contact Resistance and Schottky Barriers. 3.1 Introduction. 3.2 Metal-Semiconductor Contacts. 3.3 Contact Resistance. 3.4 Measurement Techniques. 3.5 Schottky Barrier Height. 3.6 Comparison of Methods. 3.7 Strengths and Weaknesses. Appendix 3.1 Effect of Parasitic Resistance. Appendix 3.2 Alloys for Contacts to Semiconductors. References. Problems. Review Questions. 4 Series Resistance, Channel Length and Width, and Threshold Voltage. 4.1 Introduction. 4.2 PN Junction Diodes. 4.3 Schottky Barrier Diodes. 4.4 Solar Cells. 4.5 Bipolar Junction Transistors. 4.6 MOSFETS. 4.7 MESFETS and MODFETS. 4.8 Threshold Voltage. 4.9 Pseudo MOSFET. 4.10 Strengths and Weaknesses. Appendix 4.1 Schottky Diode Current-Voltage Equation. References. Problems. Review Questions. 5 Defects. 5.1 Introduction. 5.2 Generation-Recombination Statistics. 5.3 Capacitance Measurements. 5.4 Current Measurements. 5.5 Charge Measurements. 5.6 Deep-Level Transient Spectroscopy (DLTS). 5.7 Thermally Stimulated Capacitance and Current. 5.8 Positron Annihilation Spectroscopy (PAS). 5.9 Strengths and Weaknesses. Appendix 5.1 Activation Energy and Capture Cross-Section. Appendix 5.2 Time Constant Extraction. Appendix 5.3 Si and GaAs Data. References. Problems. Review Questions. 6 Oxide and Interface Trapped Charges, Oxide Thickness. 6.1 Introduction. 6.2 Fixed, Oxide Trapped, and Mobile Oxide Charge. 6.3 Interface Trapped Charge. 6.4 Oxide Thickness. 6.5 Strengths and Weaknesses. Appendix 6.1 Capacitance Measurement Techniques. Appendix 6.2 Effect of Chuck Capacitance and Leakage Current. References. Problems. Review Questions. 7 Carrier Lifetimes. 7.1 Introduction. 7.2 Recombination Lifetime/Surface Recombination Velocity. 7.3 Generation Lifetime/Surface Generation Velocity. 7.4 Recombination Lifetime-Optical Measurements. 7.5 Recombination Lifetime-Electrical Measurements. 7.6 Generation Lifetime-Electrical Measurements. 7.7 Strengths and Weaknesses. Appendix 7.1 Optical Excitation. Appendix 7.2 Electrical Excitation. References. Problems. Review Questions. 8 Mobility. 8.1 Introduction. 8.2 Conductivity Mobility. 8.3 Hall Effect and Mobility. 8.4 Magnetoresistance Mobility. 8.5 Time-of-Flight Drift Mobility. 8.6 MOSFET Mobility. 8.7 Contactless Mobility. 8.8 Strengths and Weaknesses. Appendix 8.1 Semiconductor Bulk Mobilities. Appendix 8.2 Semiconductor Surface Mobilities. Appendix 8.3 Effect of Channel Frequency Response. Appendix 8.4 Effect of Interface Trapped Charge. References. Problems. Review Questions. 9 Charge-based and Probe Characterization. 9.1 Introduction. 9.2 Background. 9.3 Surface Charging. 9.4 The Kelvin Probe. 9.5 Applications. 9.6 Scanning Probe Microscopy (SPM). 9.7 Strengths and Weaknesses. References. Problems. Review Questions. 10 Optical Characterization. 10.1 Introduction. 10.2 Optical Microscopy. 10.3 Ellipsometry. 10.4 Transmission. 10.5 Reflection. 10.6 Light Scattering. 10.7 Modulation Spectroscopy. 10.8 Line Width. 10.9 Photoluminescence (PL). 10.10 Raman Spectroscopy. 10.11 Strengths and Weaknesses. Appendix 10.1 Transmission Equations. Appendix 10.2 Absorption Coefficients and Refractive Indices for Selected Semiconductors. References. Problems. Review Questions. 11 Chemical and Physical Characterization. 11.1 Introduction. 11.2 Electron Beam Techniques. 11.3 Ion Beam Techniques. 11.4 X-Ray and Gamma-Ray Techniques. 11.5 Strengths and Weaknesses. Appendix 11.1 Selected Features of Some Analytical Techniques. References. Problems. Review Questions. 12 Reliability and Failure Analysis. 12.1 Introduction. 12.2 Failure Times and Acceleration Factors. 12.3 Distribution Functions. 12.4 Reliability Concerns. 12.5 Failure Analysis Characterization Techniques. 12.6 Strengths and Weaknesses. Appendix 12.1 Gate Currents. References. Problems. Review Questions. Appendix 1 List of Symbols. Appendix 2 Abbreviations and Acronyms. Index.
6,573 citations
TL;DR: In this paper, a review of the literature in the area of alternate gate dielectrics is given, based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success.
Abstract: Many materials systems are currently under consideration as potential replacements for SiO2 as the gate dielectric material for sub-0.1 μm complementary metal–oxide–semiconductor (CMOS) technology. A systematic consideration of the required properties of gate dielectrics indicates that the key guidelines for selecting an alternative gate dielectric are (a) permittivity, band gap, and band alignment to silicon, (b) thermodynamic stability, (c) film morphology, (d) interface quality, (e) compatibility with the current or expected materials to be used in processing for CMOS devices, (f) process compatibility, and (g) reliability. Many dielectrics appear favorable in some of these areas, but very few materials are promising with respect to all of these guidelines. A review of current work and literature in the area of alternate gate dielectrics is given. Based on reported results and fundamental considerations, the pseudobinary materials systems offer large flexibility and show the most promise toward success...
5,711 citations
IBM1
TL;DR: In this article, the authors present new insight into conduction mechanisms and performance characteristics, as well as opportunities for modeling properties of organic thin-film transistors (OTFTs) and discuss progress in the growing field of n-type OTFTs.
Abstract: Organic thin-film transistors (OTFTs) have lived to see great improvements in recent years. This review presents new insight into conduction mechanisms and performance characteristics, as well as opportunities for modeling properties of OTFTs. The shifted focus in research from novel chemical structures to fabrication technologies that optimize morphology and structural order is underscored by chapters on vacuum-deposited and solution-processed organic semiconducting films. Finally, progress in the growing field of the n-type OTFTs is discussed in ample detail. The Figure, showing a pentacene film edge on SiO2, illustrates the morphology issue.
4,804 citations
TL;DR: An outlook is presented on what will be required to drive this young photovoltaic technology towards the next major milestone, a 10% power conversion efficiency, considered by many to represent the efficiency at which OPV can be adopted in wide-spread applications.
Abstract: Solution-processed bulk-heterojunction solar cells have gained serious attention during the last few years and are becoming established as one of the future photovoltaic technologies for low-cost power production. This article reviews the highlights of the last few years, and summarizes today's state-of-the-art performance. An outlook is given on relevant future materials and technologies that have the potential to guide this young photovoltaic technology towards the magic 10% regime. A cost model supplements the technical discussions, with practical aspects any photovoltaic technology needs to fulfil, and answers to the question as to whether low module costs can compensate lower lifetimes and performances.
3,084 citations