Performance analysis of a multilevel inverter topology with reduced switches
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6,472 citations
"Performance analysis of a multileve..." refers background in this paper
...They have the capability to deliver high power output with lower dv/dt or di/dt and less distorted output waveforms resulting in reduction of EMI noise and size of the output filter [2],[3]....
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3,232 citations
"Performance analysis of a multileve..." refers background in this paper
...III [26] where ‘N’ represents the number of output voltage levels....
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...Normalised FFT of conventional cascaded nine-level inverter III....
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2,111 citations
"Performance analysis of a multileve..." refers background or methods in this paper
...The three major multilevel inverters proposed are diode clamped (neutral clamped), flying capacitor (capacitor clamped) and cascaded H-bridge inverter with separate dc sources [2]-[4]....
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...References [2] and [24] have been discussed about the cascaded multilevel inverter topology....
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...They have the capability to deliver high power output with lower dv/dt or di/dt and less distorted output waveforms resulting in reduction of EMI noise and size of the output filter [2],[3]....
[...]
645 citations
584 citations
"Performance analysis of a multileve..." refers background in this paper
...The topologies proposed in [9]-[11] also have the same drawback because of the high frequency switches which can be used mainly for high voltage applications....
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