496 IEEE ELECTRON DEVICE LETTERS, VOL. 36, NO. 5, MAY 2015
Plasma Enhanced Atomic Layer Deposition
of Al
2
O
3
/SiO
2
MIM Capacitors
Dustin Z. Austin, Member, IEEE, Derryl Allman, Member, IEEE, David Price, Member, IEEE,
Sallie Hose, and John F. Conley, Jr., Fellow, IEEE
Abstract—Metal–insulator–insulator–metal (MIIM) capacitors
with bilayers of Al
2
O
3
and SiO
2
are deposited at 200 °C
via plasma enhanced atomic layer deposition. Employing the
cancelling effect between the positive quadratic voltage coefficient
of capacitance (αVCC) of Al
2
O
3
and the negative αVCC of SiO
2
,
devices are made that simultaneously meet the International
Technology Roadmap for Semiconductors 2020 projections
for capacitance density, leakage current density, and voltage
nonlinearity. Optimized bilayer Al
2
O
3
/SiO
2
MIIM capacitors
exhibit a capacitance density of 10.1 fF/μm
2
, a leakage current
density of 6.8 nA/cm
2
at 1 V, and a minimized αVCC
of −20 ppm/V
2
.
Index Terms—Al
2
O
3
/SiO
2
, metal-insulator-metal capacitors,
MIMCAPs, MIIM, plasma enhanced atomic layer deposition,
PEALD, quadratic voltage coefficient of capacitance, αVCC.
I. INTRODUCTION
B
ACK end of line (BEOL) metal-insulator-metal
capacitors (MIMCAPs) reduce the need for discrete
off-board components and have become core passive devices
in integrated circuits (IC). Applications of MIMCAPs
include analog-to-digital converters, analog noise filters,
DC voltage decoupling, and electrostatic discharge protection.
According to the 2020 node of the International Technology
Roadmap for Semiconductors (ITRS), scaling the area
of these devices for analog/mixed-signal ICs will require
increasing capacitance density (to greater than 10 fF/μm
2
)
while simultaneously maintaining low voltage nonlinearity
(less than 100 ppm/V
2
, characterized by the quadratic voltage
coefficient of capacitance, αVCC) and low leakage current
density (less than 10 nA/cm
2
at 1V) [1]. In addition to these
conflicting performance requirements, BEOL processing
allows for temperatures of no more than 400 °C [2].
Increasing capacitance density may be achieved either by
decreasing the insulator film thickness or by introducing
high dielectric constant (κ) materials. Simply decreasing the
insulator film thickness leads to increased tunneling leakage
Manuscript received February 11, 2015; revised March 10, 2015; accepted
March 10, 2015. Date of publication March 16, 2015; date of current version
April 22, 2015. This work was supported in part by ON Semiconductor and
in part by ONAMI. The review of this letter was arranged by Editor A. Chin.
D. Z. Austin and J. F. Conley, Jr. are with the School of Electrical
Engineering and Computer Science, Oregon State University, Corvallis,
OR 97331 USA (e-mail: john.conley@oregonstate.edu).
D. Allman, D. Price, and S. Hose are with ON Semiconductor, Technology
Development, Gresham, OR 97030 USA.
Color versions of one or more of the figures in this letter are available
online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/LED.2015.2412685
as well as increased voltage nonlinearity [3], [4]. On the other
hand, most high-κ insulators also have drawbacks such as
large positive αVCCs, small metal-insulator barrier heights,
and increased conduction through defect levels [5]. Thus,
single insulator devices have been unable to simultaneously
meet all three performance projections of future ITRS nodes.
A promising approach to meeting all of these competing
performance needs is to use multi-layer insulator stacks
to combine materials with complementary properties
(e.g. a high-κ, positive αVCC insulator with a low leakage,
negative αVCC insulator) [6]–[12]. Previous reports of
multi-insulator structures that meet or come close to meeting
upcoming ITRS projections are listed in Table II. Note
however that these previous studies employ either complex or
uncommon materials, break vacuum between insulating layers,
or are processed outside the specified BEOL temperature
limit.
In the present work, Al
2
O
3
/SiO
2
bilayers are investigated
for potential use in BEOL RF MIMCAPs. Al
2
O
3
and SiO
2
are attractive due to their large metal-insulator barrier heights,
high dielectric breakdown strength, and common usage in
IC fabrication. In addition, SiO
2
is one of the few materials
to exhibit a negative αVCC and thus can be used in combi-
nation with the positive αVCC of Al
2
O
3
to target ultra-low
device voltage nonlinearity through αVCC canceling [7].
Plasma enhanced atomic layer deposition (PEALD) is used to
deposit high quality pin-hole free nanolaminate Al
2
O
3
/SiO
2
stacks at low temperature without breaking vacuum. The self-
limiting reactions of PEALD enable precise control over film
thickness, which is critical for optimizing the αVCC cancelling
effect for ultra-thin films. The capacitance density, leakage
current density, and αVCC of Al
2
O
3
/SiO
2
MIIMCAPs are
benchmarked against future ITRS projections.
II. E
XPERIMENTAL
Si/SiO
2
/Ta/TaN substrates with the SiO
2
layer planarized
via chemical mechanical polishing were used as the bottom
electrodes. PEALD of Al
2
O
3
and SiO
2
was performed
at 200 °C in a Picosun SUNALE R-200 reactor using alter-
nating N
2
-purge-separated pulses of O
2
and either trimethy-
laluminum (TMA) or bis(diethylamino)silane (BDEAS),
respectively. TMA was held at 17 °C and BDEAS held
at 55 °C. The deposition rates of Al
2
O
3
and SiO
2
were
approximately 0.10 nm/cycle and 0.11 nm/cycle, respectively.
The Al
2
O
3
layer was always deposited first. 250 μm diameter
evaporated Al dot top contacts with areas of ∼0.05 mm
2
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AUSTIN et al.: PEALD OF Al
2
O
3
/SiO
2
MIM CAPACITORS 497
Fig. 1. Plot of αVCC for Al
2
O
3
(blue squares) and |αVCC| for
SiO
2
(green diamonds) vs. film thickness (d
ox
). Dashed lines indicate power
law fits.
were defined via shadow mask. The area of each device was
measured and used for area normalizations. The average
error in the area measurement is found to be +/−1.8%.
Film thickness of select samples was measured using either
an FEI Tecnai F20 high-resolution transmission electron
microscope (TEM) or a J. A. Woollam M2000 spectroscopic
ellipsometer. 100 kHz capacitance vs. voltage (CV)
measurements were conducted using an Agilent E4980.
Current vs. voltage (IV) measurements were taken using an
Agilent B1500A. All electrical tests were conducted with
the bottom electrode held at ground and performed in the
dark at a controlled 25 °C. CV measurements were swept
to approximately one-half breakdown voltage in order to
avoid excessive stress during testing. To reduce displacement
current, CV and IV measurements were performed at sweep
rates of 0.2 V/s.
III. R
ESULTS AND DISCUSSION
The voltage nonlinearity of MIMCAPs can be described by
the quadratic equation, C/C
0
= αV
2
+ βV. S h o w n i n F i g . 1 ,
the αVCC for Al
2
O
3
and |αVCC| for SiO
2
are plotted together
as a function of single layer insulator thickness. A simple
power law was found to fit well the thickness dependence
of αVCC. Combining the power law fits with the capacitive
voltage divider equation, approximate layer thicknesses were
estimated for Al
2
O
3
/SiO
2
bilayers that simultaneously meet
ITRS projections for capacitance density and αVCC.
Shown in Fig. 2 are forward/reverse capacitance density vs.
voltage sweeps for MIIM devices with 40c of Al
2
O
3
and either
13c, 15c, or 17c of SiO
2
, where “c” represents the number
of PEALD cycles. As the difference in thickness between
these ultra-thin film stacks is difficult to measure accurately,
the number of PEALD cycles is used for identification. The
40c/17c Al
2
O
3
/SiO
2
MIIM devices (measured via TEM
to be approximately 3.7 nm/1.9 nm) were found to meet
the ITRS 2020 projection for capacitance density with
10.1 fF/μm
2
and a minimized αVCC of −20 ppm/V
2
.
Note that optimized αVCC values are not exactly as predicted
by simple theory which considers only “bulk” αVCC mecha-
nisms [7]. αVCC mechanisms are not well understood [4] and
Fig. 2. Forward (blue) and reverse (green) sweeps of capacitance density
vs. voltage for TaN/Al
2
O
3
/SiO
2
/Al stacks targeting ITRS 2020. Inset: the
effective dielectric constant vs. frequency for the 3.7nm/1.9nm device.
Fig. 3. Current density vs. voltage sweeps for TaN/Al
2
O
3
/SiO
2
/Al stacks
targeting various ITRS nodes. The estimated thickness and number of PEALD
cycles for each insulator pair are included in the legend.
the discrepancy is likely due to contributions of secondary
nonlinearity mechanisms [12] such as electrode
effects [13], [14]. As shown in the inset, the effective
dielectric constant of these devices shows little frequency
dependence up to 1 MHz. A slight negative β can be observed
for all of these devices, which might be attributed to the
electrode work function difference. The thickness control of
PEALD is a clear advantage for minimizing αVCC. As seen
in Fig. 2, the difference between the device with 300 ppm/V
2
(40c/15c) and the device with −20 ppm/V
2
(40c/17c), was
only 2 PEALD cycles of SiO
2
.
Current density vs. voltage sweeps for Al
2
O
3
/SiO
2
stacks
targeting future ITRS nodes are shown Fig. 3. The small
asymmetry seen between positive and negative polarity
likely arises from (i) the work function difference of
Al (4.2 eV) vs. TaN (4.6 eV) electrodes and (ii) the presence of
deep level defects in the SiO
2
which may enable trap-assisted-
tunneling at low bias [5]. The intersection between the vertical
and horizontal dashed lines indicates the ITRS maximum
leakage limit of 10 nA/cm
2
at 1V. Results are summarized
in Table I. The 3.7 nm/1.9 nm (40c/17c) Al
2
O
3
/SiO
2
device
meets all ITRS 2020 projections with a low αVCC/C
2
ox
of
498 IEEE ELECTRON DEVICE LETTERS, VOL. 36, NO. 5, MAY 2015
TABLE I
C
OMPARISON OF Al
2
O
3
/SiO
2
STACKS MEETING
INCREMENTAL ITRS NODES
Fig. 4. Capacitance variation vs. positive constant voltage stress time. Inset
shows plot of voltage ramped breakdown for positive and negative polarity.
TABLE II
C
OMPARISON OF LOW VOLTAGE NONLINEARITY MIIM CAPACITORS
0.2 μm
4
/V
2
fF
2
(a figure of merit proposed in [6]). Targeting
film thicknesses to meet the ITRS 2023 capacitance density
requirement resulted in leakage current density exceeding
the 10 nA/cm
2
limit at 1V. Reduced leakage, which would
possibly allow further scaling of this stack, could likely be
achieved either by either the use of larger work function
electrodes to increase the metal-insulator barrier heights or
annealing to reduce defect density. The use of low oxygen
affinity (−H
OX
) metals may also reduce αVCC.
In Fig. 4 the 3.7 nm/1.9 nm (40c/17c) Al
2
O
3
/SiO
2
device
shows little variation with positive constant voltage stress
time at fields below 9 MV/cm which, as seen in the inset
with voltage ramped breakdown, is close to the breakdown
strength of this stack. The difference in breakdown between
positive and negative polarities is due to the built-in field of
the electrodes. The negative polarity requires higher field to
overcome the built-in field.
IV. C
ONCLUSION
Al
2
O
3
/SiO
2
bilayers deposited via PEALD at 200 °C are
investigated for applications in MIIM capacitors. An insu-
lator stack consisting of 3.7 nm of Al
2
O
3
and 1.9 nm of
SiO
2
demonstrates a capacitance density of 10.1 fF/μm
2
,
a leakage current density of 6.8 nA/cm
2
at 1V, and an
αVCC of −20 ppm/V
2
. Benchmarking our results against
the ITRS roadmap, it is seen that the Al
2
O
3
/SiO
2
stack
simultaneously meets the 2020 node for capacitance density,
leakage current density, and voltage nonlinearity projections
with mainstream materials and low temperature processing.
A
CKNOWLEDGMENT
Devices fabricated at the OSU Materials Synthesis and
Characterization (MaSC) Facility.
R
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