IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 49, NO. 1, JANUARY 2001 9
Power-Amplifier Modules Covering 70–113 GHz
Using MMICs
Huei Wang, Senior Member, IEEE, Lorene Samoska, Todd Gaier, Alejandro Peralta, Hsin-Hsing Liao, Y. C. Leong,
Sander Weinreb, Fellow, IEEE, Yaochung. C. Chen, Member, IEEE, M. Nishimoto, and Richard Lai
Abstract—A set of -band power amplifier (PA) modules
using monolithic microwave integrated circuits (MMICs) have
been developed for the local oscillators of the far-infrared and
sub-millimeter telescope (FIRST). The MMIC PA chips include
three driver and three PAs, designed using microstrip lines, and
another two smaller driver amplifiers using coplanar waveguides,
covering the entire
-band. The highest frequency PA, which
covers 100–113 GHz, has a peakpower of greater than 250 mW (25
dBm) at 105 GHz, which is the best output power performance for
a monolithic amplifier above 100 GHz to date. These monolithic
PA chips are fabricated using 0.1-
m AlGaAs/InGaAs/GaAs
pseudomorphic T-gate power high electron-mobility transistors
on a 2-mil GaAs substrate. The module assembly and testing,
together with the system applications, will also be addressed in
this paper.
Index Terms—GaAs, HEMT, millimeter wave, MMIC, power-
amplifier module.
I. INTRODUCTION
W
-BAND MMIC power amplifiers (PAs) have been de-
veloped for transmitter applications [1], [2]. These am-
plifiers can be used as drivers for local-oscillator (LO) sources
at frequencies into the terahertz range. The LOs for the far-in-
frared and sub-millimeter telescope (FIRST) will be comprised
of synthesizers and active multipliers to provide output frequen-
cies of 71–112.5 GHz, PAs to amplify these
-band signals,
and finally, chains of Schottky diode multipliers to achieve tera-
hertz frequencies. Table I presents the frequency range of the PA
chip set and the associated frequency multiplication plan. The
PA frequency breakdown is a trade of the power output and the
bandwidth based on state-of-the-art capability of current GaAs
power high electron-mobility transistor (HEMT) monolithic-
Manuscript received March 27, 2000; revised August 23, 2000. This work
was supported in part by the Jet Propulsion Laboratory, California Institute of
Technology, under a Contract with the National Aeronautics and Space Admin-
istration.
H. Wang is with the Department of Electrical Engineering and Graduate
Institute of Communication Engineering, National Taiwan University, Taipei,
Taiwan 10617, R.O.C. (e-mail: hueiwang@ew.ee.ntu.edu.tw).
L. Samoska, T. Gaier, and S. Weinreb are with the Jet Propulsion Laboratory,
Pasadena, CA 91149 USA.
A. Peralta was with the Jet PropulsionLaboratory, Pasadena, CA 91149 USA.
He is nowwith the BEI Duncan Electronics Division Sensors and Systems Com-
pany.
H.-H. Liao was with the Space and Electronics Group, TRW, Redondo Beach,
CA 90278 USA. He is now with the Waveplus Technology Company Ltd.,
Taiwan, R.O.C.
Y. C. Leong is with the Department of Electrical and Computer Engineering,
University of Massachusetts at Amherst, Amherst, MA 01003 USA.
Y. C. Chen, M. Nishimoto, and R. Lai are with the Space and Electronics
Group, TRW, Redondo Beach, CA 90278 USA.
Publisher Item Identifier S 0018-9480(01)01551-4.
TABLE I
F
REQUENCY RANGE OF THE PA CHIP SET AND THE
ASSOCIATED FREQUENCY
MULTIPLICATION PLAN AS DRIVERS FOR LO SOURCES AT FREQUENCIES INTO
THE
TERAHERTZ RANGE
microwave integrated circuit (MMIC) technology. The motiva-
tion of this paper isto developa set of
-band PAs, whichcould
be used for the FIRST LO chains.
This paper presents the results of these
-band PA modules,
as well as the MMIC PA chips. The MMIC chips are fabri-
cated using 0.1-
m AlGaAs/InGaAs/GaAs pseudomorphic
(PM) T-gate power HEMT MMIC technology on a 2-mil
GaAs substrate. Although InP-based HEMT MMICs have
demonstrated excellent power performance at
-band [2],
GaAs-based HEMT MMIC technology was selected for this
project due to the process maturity. The 2-mil GaAs HEMT
PAs not only demonstrated good power performance with high
yield at
-band (94 GHz) [1], but also showed impressive
results from
-to -band [3]–[6]. In this paper, three sets of
PA chips and their driver amplifiers covering 72–81, 90–101,
and 100–113 GHz were designed using microstrip lines. The
three-driver amplifiers were designed with a common-output
gate periphery of 640
m, while the PAs had 1280 m, to fulfill
output power requirements. Another two medium driver ampli-
fiers with gate peripheries of 160 and 320
m were designed
with coplanar waveguide (CPW) to cover frequency bands of
70–100 and 80–115 GHz. The measurement results indicated
each microstrip-line driver amplifier and PA provide at least
20 and 22 dBm (160 mW), respectively, in the frequency
range that it covered, while the CPW designs have output
power level of 14–17 dBm (25–50 mW). For the first time,
the full power data as a function of frequency are presented
in
-band and the wide-band capability is demonstrated.
Moreover, the 100–113-GHz PA has a peak power of greater
than 250 mW (25 dBm) at 105 GHz, which is the best output
power performance for a monolithic amplifier above 100 GHz
0018–9480/01$10.00 © 2001 IEEE
10 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 49, NO. 1, JANUARY 2001
Fig. 1. Three microstrip-line
W
-band monolithic PAs. (a) 72–81 GHz. (b)
90–101 GHz. (c) 100–113 GHz. The chip sizes are 2.3
2
1.6 mm .
Fig. 2. Three
W
-band microstrip-line drive amplifiers. (a) 72–81 GHz. (b)
90–101 GHz. (c) 100–113 GHz.
to date. The MMIC PA chip testing and module assembly with
the WR-10 waveguide input/output ports will also be included
in this paper.
II. MMIC P
ROCESS AND DEVICE CHARACTERISTICS
The 0.1- m power HEMT device development has been re-
ported [7]. The HEMT structure is grown using molecular beam
epitaxy (MBE) on 3-in substrates and uses a PM In
Ga As
channel. The HEMT device structure is based on a double het-
erostructure design to achieve a high-aspect ratio for 0.1-
m
gate lengths. The devices typically exhibita gate-to-drain break-
downvoltage of 6 V measured ata gate current of 0.1 mA/mm, a
peak dc transconductance of600mS/mm,a maximum currentof
600 mA/mm, aunit current gainfrequency
of 130 GHz,and a
maximum oscillation frequency
of greater than 200 GHz.
The HEMT linear small-signal equivalent-circuit parameters
are obtained from careful fit of the measured small-signal
-pa-
rameters to 50 GHz. These parameters are consistent with es-
timation based on device physical dimensions and parameters.
Fig. 3. Two
W
-band medium power CPW drive amplifiers. (a) 65–102 GHz.
(b) 80–115 GHz.
Fig. 4. 70–115-GHz on-wafer small-signal
S
-parameter test set. (a) Block
diagram. (b) Photograph.
The Curtice–Ettenberg FET asymmetric model was used to de-
scribe the HEMT device nonlinear behavior [8]. The nonlinear
transconductance coefficients were then obtained from fitting
the dc–I-V measurement of the devices. The device models have
been verified by comparing the measured and simulation results
of simple prematched device structures [1].
WANG et al.: PA MODULES COVERING 70–113 GHz USING MMICs 11
Fig. 5. (a) Configuration for longitudinal transition. (b) Drawing of the module housing design. (c) Photographs of a CPW driver amplifier chip mounted in the
module. (d) Cascaded associated driver or PA modules in the same frequency bands.
III. MMIC PA DESIGN
The MMIC PAs can be designed using either microstrip line
or CPW. CPW hasthe advantage for ease ofa shunt element,i.e.,
for a single HEMT with common source configuration, it can be
easily implemented in the layout design. However, for large de-
vice periphery (high-output power) designs, since a number of
HEMT devices need to be combined, it becomes difficult to ar-
range in the layout because a source ground cannot be easily
realized, especially in millimeter-wave frequency range. On the
other hand, microstrip-line environment is preferred to stack
common transistors device in parallel with a via-hole source
ground between the HEMT devices. Therefore, the microstrip
line is used to design the high-output PA and driver chips, while
the CPW is used to design the medium driver amplifiers in this
paper.
Fig. 1 shows the three PA chips (covering 72–81, 90–101, and
100–113 GHz). Allthe three PAs follow a common circuitarchi-
tecture, whichis a single-ended two-stage design.The first stage
employs four cells of eight-finger, 160-
m HEMT devices, and
second stage has twice the device periphery with eight HEMT
devices.The topology used for the PA designs has been reported
in [1],with matching networks realized byhigh–low-impedance
transmission lines. For these new designs, reactive matching el-
ements were optimized for increased bandwidth and higher fre-
quencyperformance. EMsimulations were performedfor all the
passive structures using Sonnet [9]. The driver amplifiers also
follow a common circuit architecture, which is similar to that of
the PAs with half of the gate peripheries for both the first and
second stages. Fig. 2 shows the chip photographs of the three
driver amplifiers. The chip sizes for all of the amplifiers are
2.3
1.6 mm , in order to facilitate ease of dicing of the wafers.
The photographs of the two CPW medium power-driver
amplifiers are shown in Fig. 3. They are both broad-band
designs. The first one (Fig. 3(a), chip size 2.3 mm
1.2 mm)
is a three-stage amplifier designed to cover a frequency
range of 70–100 GHz, while the second one [see Fig. 3(b)],
with the same chip size, is a four-stage design to cover
80–115 GHz. The matching networks are also implemented
with high–low-impedance transmission lines with metal–insu-
lator–metal (MIM) capacitors used in the interstage matching
networks for dc block and bias networks for RF bypass. The de-
vice peripheries are160-160-160
m and 160-160-160-320 m,
respectively. Compared with the microstrip two-stage designs,
these two CPW designs have higher input/output impedance
at the device end and, thus, are easier to obtain broad band.
In addition, the three- and four-stage selections also provide
more gain margin to tradeoff bandwidth. Since the eight-finger,
160-
m HEMT device is used for a unit device cell, the output
stage of the first CPW amplifier (320-
m total gatewidth) is
composed of two separate unit HEMT device and combined
with a CPW
-junction. If more devices were to be combined
in parallel, higher
-way combiners (junctions) with low loss
in CPW must be carefully designed.
IV. PA M
EASUREMENT
On-wafer small-signal -parameter measurements were
performed on the MMIC PAs for screening purposes before the
12 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 49, NO. 1, JANUARY 2001
Fig. 6. Measured on-wafer small-signal gain versus frequency of the: (a) three
W
-band PAs, (b) three
W
-band driver amplifiers, and (c) two CPW driver
amplifiers.
wafer was diced. The block diagram of the test set is depicted
in Fig. 4(a). Standard vector-network analyzers from HP and
Anitru can be readily adapted to high frequencies with external
extenders. The extenders can be fabricated in waveguide
band through 220 GHz. Fig. 4(b) depicts a photograph of this
70–115-GHz wafer probe test set. This test set has full two-port
-parameter test capability with large dynamic range [11].
For the output power measurement,
-band on-wafer
pulsed-power capability has been demonstrated to resolve
the thermal issue and the correlation with in-fixture was also
verified [12]. However, there are two critical requirements, i.e.,
the
-band pulser and power drive for the test set must cover
the probe path loss with enough bandwidth. Both of them may
not be easy to acquire at this frequency. Therefore, the PA chips
were tested in a WR-10 waveguide module for the output power
performance. The waveguide-to-microstrip-line transitions
used in the PA modules are longitudinally mounted in the
waveguide, meaning that the surface of the alumina substrate
aligns along the direction of propagation of the waveguide
[10], as shown in Fig. 5(a). This transition demonstrated a total
loss of 1 dB and a return loss of better than 15 dB from 85 to
107 GHz for a pair of back-to-back transitions. The drawing
of the module housing design is depicted in Fig. 5(b) and the
photographs of a CPW driver amplifier chip mounted in the
module are shown in Fig. 5(c). The power test set utilized
a backward wave oscillator (BWO) as the tunable source
at the input. A calibrated power meter with
-band sensor
attachment was used to measure the output module. The extra
power required at the input port for high output PAs evaluation
are obtained by cascading the associated driver or PA modules
in the same frequency bands, as shown in Fig. 5(d).
V. M
EASUREMENT RESULTS
The MMIC PAs were first tested for gain using on-wafer
small-signal
-parameter measurements. A measured typical
small-signal gain of at least 8, 7, and 4 dB is achieved at 72–81,
90–101, and 100–113 GHz, respectively, at a drain voltage (
)
of 1.5 V with a total drain current (
) of 500 mA for the three
PAs, as shown in Fig. 6(a). The three microstrip-line driver am-
plifiers depict higher gain performance of 12, 7, and 7 dB, as
shown in Fig. 6(b), at
V and mA. Fig. 6(c)
presents the small-signal gain performance of the CPW medium
power driver amplifiers from 65 to 115 GHz. The three-stage
design demonstrated small-signal gain of more than 8 dB from
65 to 100 GHz at
V and mA, while the
four-stage design showed more than 10-dB gain from 80 to
100 GHz and greater than 8 dB up to 110 GHz at
V
and
mA.
For the PA module testing, individual PA modules were eval-
uated for output power. The measurements were performed at
V to maximize output power and bandwidth of the
chips. The driver amplifiers showed up to 100 mW of peak
output power, and the PAs typically exhibited 200 mW of output
WANG et al.: PA MODULES COVERING 70–113 GHz USING MMICs 13
Fig. 7. Output power versus frequency plot of the three
W
-band packaged
PAs.
power. The amplifier modules were then cascaded in order of
increasing output stage gate periphery: the driver (640
m) was
followed by a PA (1.28 mm). Fig. 7 shows the maximum output
power performance versus frequency at the output of the cas-
caded modules. Three frequency bands are covered in three sep-
arate pairs of modules. Each amplifier chain demonstrated at
least 22 dBm (158 mW) in the frequency range it covers. The
100–113-GHz PA has a peak power of greater than 250 mW
(25 dBm) at 105 GHz, which is the best output power perfor-
mance for a monolithic amplifier above 100 GHz to date. It is
also noted that the waveguide transition has an insertion loss of
0.35 dB up to 107 GHz, and 0.5 dB from 107–115 GHz [10].
For the output power results at the MMIC chip end, the num-
bers mentioned above need to be corrected by this loss factor.
Typical power-added efficiencies for an amplifier chain are in
the range of 4%–9%, with dc input power levels of 2.5–3.5 W.
Forexample,astheresults indicated, bythe evaluationof achain
of the 72–81-GHz driver amplifier module (APH350C) cas-
caded with PA module (APH351C). Fig. 8(a) shows the small-
signal gain and return-loss responses of this cascaded chain
from 65 to 118 GHz. It demonstrates a peak gain of 29 dB at
75 GHz andgreaterthan 24 dBfrom 72 to 81GHz. The biascon-
dition is
V with and 500 mA for the driver
amplifier and the PA, respectively. The output power versus fre-
quency is already shown in Fig. 7, and the drain efficiency from
70 to 83 GHz is plotted in Fig. 8(b).
Another chain of 90–101-GHz PA modules, formed by cas-
cading a CPW medium driver amplifier module (APH352C),
a driver amplifier module (APH348C), and PA (APH349C)
module. The small-signal gain and return loss from 80 to
120 GHz is presented in Fig. 9(a) with
V and total
mA. The peak gain is 31.2 dB at 92.6 GHz and
greater than 20 dB from 88 to 102 GHz. The output power and
gain versus input power at 93 GHz are depicted in Fig. 9(b).
It shows a 3-dB compression at 16-dBm output power and a
saturation output power (
) of 24.5 dBm.
In the output power measurements and the small-signal
gain measurements, 1–5 dB of ripple is present in the
cascaded-module experimental data, with a periodicity of
approximately 3 GHz. To explain this phenomena, we will dis-
cuss the problem of cascading two amplifier modules together:
a microstrip driver amplifier followed by a microstrip PA.
Fig. 8. Performance of the 72–81 GHz amplifier chain (microstrip driver
+
PA). (a) Small-signal gain and return loss versus frequency. (b) Drain efficiency
versus frequency.
Both modules include a waveguide input, input alumina probe
transition, microstrip chip, output alumina probe transition, and
output waveguide, as shown in Fig. 5(c). A small mismatch
between the chip and probe transition at the output of the first
module, and another mismatch between the probe transition
and chip at the input of the second module, is responsible for
reflections with a periodicity related to the electrical length
between the two chips. In Fig. 10(a), we present the theo-
retical gain of the two amplifier modules cascaded together,
illustrating the ripple present in small-signal gain. For the
prediction, the theoretical probe transition data [10] was used to
simulate the effect of the probe, the power–current definition of
waveguide impedance (
) was used to simulate the length of
waveguide between the chips, and the measured on-wafer gain
of two representative amplifier chips were used to model the PA
chips. Fig. 10(b) shows the experimental result of cascading the
modules. While Fig. 10(a) and (b) does not agree exactly, our
crude theoretical model predicts the ripple effect reasonably
well. The differences between theory and experiment most
likely have to do with chip-to-chip variation (the on-wafer data
is taken from a different chip than the packaged chip), as well
as tuning effects present in each module due to variations in
packaging. In order to reduce this ripple, a better match must
be provided between the PA chip inputs and outputs, and the
probe transition. Improving the return loss of the chips is also
likely to reduce the ripple.
