Proceedings ArticleDOI
Power Integrity analysis and discrete optimization of decoupling capacitors on high speed power planes by particle swarm optimization
Jai Narayan Tripathi,Raj Kumar Nagpal,Nitin Kumar Chhabra,Rakesh Malik,Jayanta Mukherjee,Prakash R. Apte +5 more
- pp 670-675
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TLDR
Power Integrity problem for a high speed power plane is discussed in context of selection and placement of decoupling capacitors.Abstract:
Power Integrity problem for a high speed power plane is discussed in context of selection and placement of decoupling capacitors. The s-parameters data of power plane geometry and capacitors are used for the accurate analysis including bulk capacitors and VRM, for a real world problem. The optimal capacitors and their optimum locations on the board are found using particle swarm optimization. A novel and accurate methodology is presented which can be used for any high speed Power delivery Network.read more
Citations
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Proceedings ArticleDOI
A novel EBG structure with super-wideband suppression of simultaneous switching noise in high speed circuits
Jai Narayan Tripathi,Jayanta Mukherjee,Prakash R. Apte,Raj Kumar Nagpal,Nitin Kumar Chhabra,Rakesh Malik +5 more
TL;DR: In this paper, a novel uniplanar electromagnetic band-gap structure to maintain power integrity by suppressing simultaneous switching noise (SSN) is presented, which can be used on board, package or at die level.
Proceedings ArticleDOI
Decoupling network optimization in high speed systems by mixed-integer programming
Jai Narayan Tripathi,Ashutosh Mahajan,Jayanta Mukherjee,Raj Kumar Nagpal,Rakesh Malik,Nitin Gupta +5 more
TL;DR: This paper provides a generic formulation for decoupling capacitor selection and placement problem which is solved by mixed-integer programming.
Journal ArticleDOI
MCB-DPO: Multiport Constrained Barrier Method-Based Decoupling Capacitor Placement Optimization on Irregularly Shaped Planes
Ihsan Erdin,Ramachandra Achar +1 more
TL;DR: In this article , a multi-port constrained optimization methodology is presented for the optimal placement of decoupling capacitors in power distribution networks (PDNs) of printed circuit boards (PCBs).
Proceedings ArticleDOI
Application of nature inspired algorithms in power delivery network design: An industrial case study
TL;DR: Three natural computing algorithms - Particle Swarm Optimization, Cuckoo Search and Firefly Algorithm are used and compared for solving an industrial problem of power delivery network design.
A Domain Decomposition Approach for Assessment of Decoupling Capacitors in Practical PDNs
TL;DR: In this article , a domain decomposition method is proposed to evaluate the effectiveness of decoupling capacitors in practical power delivery networks (PDNs), based on the separation of a PDN into its local and non-local domains.
References
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Proceedings ArticleDOI
Low-Power Low-Voltage Analog Circuit Design Using Hierarchical Particle Swarm Optimization
TL;DR: This paper presents application and effectiveness of Hierarchical particle swarm optimization (HPSO) algorithm for automatic sizing of low-power analog circuits and shows that HPSO algorithm converges to a better solution, compared to PSO and GA.
Journal ArticleDOI
Efficient In-Package Decoupling Capacitor Optimization for I/O Power Integrity
TL;DR: It is shown that impedance metric leads to large overdesign and then a noise-driven optimization algorithm for decoupling capacitors in packages for power integrity is developed and reduced by 3times and more than 10times faster even with explicit noise computation.
Journal ArticleDOI
GA-optimized decoupling capacitors damping the rectangular power-bus' cavity-mode resonances
TL;DR: In this article, the authors proposed a GA to find the decoupling capacitors for suppressing the cavity-mode resonances in the printed circuit board power-bus structure, where the optimal positions and circuital values of decoupled capacitors are efficiently determined to selectively mitigate specific resonance peaks.
Journal ArticleDOI
Optimization for the Locations of Decoupling Capacitors in Suppressing the Ground Bounce by Genetic Algorithm
TL;DR: In this paper, the optimal placement of decoupling capacitors in suppressing the input and transfer impedances of power-ground planes was investigated in high-speed digital printed circuit boards.
Proceedings ArticleDOI
Effective strategies for choosing and locating printed circuit board decoupling capacitors
TL;DR: In this article, the authors discuss strategies for locating and mounting decoupling capacitors in various situations as well as methods for estimating the total amount of decoupled capacitance required.