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Power Integrity Modeling and Design for Semiconductors and Systems

TL;DR: This book's system-level focus and practical examples will make it indispensable for every student and professional concerned with power integrity, including electrical engineers, system designers, signal integrity engineers, and materials scientists.
Abstract: The First Comprehensive, Example-Rich Guide to Power Integrity ModelingProfessionals such as signal integrity engineers, package designers, and system architects need to thoroughly understand signal and power integrity issues in order to successfully design packages and boards for high speed systems Now, for the first time, there's a complete guide to power integrity modeling: everything you need to know, from the basics through the state of the artUsing realistic case studies and downloadable software examples, two leading experts demonstrate today's best techniques for designing and modeling interconnects to efficiently distribute power and minimize noiseThe authors carefully introduce the core concepts of power distribution design, systematically present and compare leading techniques for modeling noise, and link these techniques to specific applications Their many examples range from the simplest (using analytical equations to compute power supply noise) through complex system-level applicationsThe authors Introduce power delivery network components, analysis, high-frequency measurement, and modeling requirements Thoroughly explain modeling of power/ground planes, including plane behavior, lumped modeling, distributed circuit-based approaches, and much more Offer in-depth coverage of simultaneous switching noise, including modeling for return currents using time- and frequency-domain analysis Introduce several leading time-domain simulation methods, such as macromodeling, and discuss their advantages and disadvantages Present the application of the modeling methods on several advanced case studies that include high-speed servers, high-speed differential signaling, chip package analysis, materials characterization, embedded decoupling capacitors, and electromagnetic bandgap structures This book's system-level focus and practical examples will make it indispensable for every student and professional concerned with power integrity, including electrical engineers, system designers, signal integrity engineers, and materials scientists It will also be valuable to developers building software that helps to analyze high-speed systems
Citations
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Journal ArticleDOI
TL;DR: This paper reviews recent progress and future directions of signal integrity design for high-speed digital circuits, focusing on four areas: signal propagation on transmission lines, discontinuity modeling and characterization, measurement techniques, and link-path design and analysis.
Abstract: This paper reviews recent progress and future directions of signal integrity design for high-speed digital circuits, focusing on four areas: signal propagation on transmission lines, discontinuity modeling and characterization, measurement techniques, and link-path design and analysis.

230 citations

Journal ArticleDOI
TL;DR: In this article, the authors reviewed possible solutions based on decoupling or isolation for suppressing power distribution network (PDN) noise on package or printed circuit board (PCB) levels.
Abstract: Mitigating power distribution network (PDN) noise is one of the main efforts for power integrity (PI) design in high-speed or mixed-signal circuits. Possible solutions, which are based on decoupling or isolation concept, for suppressing PDN noise on package or printed circuit board (PCB) levels are reviewed in this paper. Keeping the PDN impedance very low in a wide frequency range, except at dc, by employing a shunt capacitors, which can be in-chip, package, or PCB levels, is the first priority way for PI design. The decoupling techniques including the planes structure, surface-mounted technology decoupling capacitors, and embedded capacitors will be discussed. The isolation approach that keeps part of the PDN at high impedance is another way to reduce the PDN noise propagation. Besides the typical isolation approaches such as the etched slots and filter, the new isolation concept using electromagnetic bandgap structures will also be discussed.

200 citations

Journal ArticleDOI
TL;DR: In this article, the state of the arts of IC, electronic package, and printed circuit board simulation and modeling technologies are summarized for both available structures [multilayered powerground planes and macromodeling of interconnect (INC)] and novel structures (nano-INCs and 3-D ICs based on through-silicon via technology).
Abstract: The ever-increasing demands of digital computing and wireless communication have been driving the semiconductor technology to change with each passing day. Modern electronic systems integrate more complex components and devices, which results in a very complex electromagnetic (EM) field environment. EM compatibility has become one of the major issues in ICs redesign, mainly due to the lack of efficient and accurate simulation tools and expertise on noise reduction and immunity improvement. This paper reviews the state of the arts of IC, electronic package, and printed circuit board simulation and modeling technologies. It summarizes the modeling technologies for both available structures [multilayered power-ground planes and macromodeling of interconnect (INC)] and novel structures (nano-INCs and 3-D ICs based on through-silicon via technology). It also illustrates the trends of simulation and modeling technologies in EM compatibility, signal integrity, and power integrity.

166 citations

Journal ArticleDOI
TL;DR: In this paper, a specific case of RPD based on via discontinuities is discussed in detail in the context of both the frequency and time-domain waveforms using a test vehicle.
Abstract: After providing an overview of the state-of-the-art in power distribution design and modeling, this paper focuses on return path discontinuities (RPDs) for I/O signaling. After briefly describing their importance in the context of simultaneous switching noise, a specific case of RPD based on via discontinuities is discussed in detail in the context of both the frequency- and time-domain waveforms using a test vehicle. The modeling of RPD in practical packages and printed circuit boards is addressed along with substrate coupling due to nonideal reference planes. Finally, a high-impedance power distribution scheme for I/O signaling is presented that can potentially solve a number of RPD-related problems, followed by future challenges.

130 citations


Cites background or methods from "Power Integrity Modeling and Design..."

  • ...Most of these methods are discussed in detail in [11]....

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  • ...While constructing the model, parameter k = –1 in (22) for the microstrip line referenced to the nonideal voltage reference plane [11]....

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  • ...planes can be expressed as follows [11]:...

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  • ...The equivalent circuit model for the microstrip-to-microstrip transition involves a π model representation for the vias connected to the corresponding planes [11]....

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  • ...Equation (14) can be converted into an equivalent circuit model representation [11] within a unit cell of dimension h × h of the form shown in Fig....

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Journal ArticleDOI
TL;DR: In this paper, an equivalent circuit model for coupled through silicon via (TSV) structures in a 3D integrated circuit is presented, where TSVs are embedded in a lossy silicon medium, hence they behave as metal-insulator-semiconductor (MIS) transmission lines.
Abstract: This paper presents analytical formulas to extract an equivalent circuit model for coupled through silicon via (TSV) structures in a 3-D integrated circuit. We make use of a multiconductor transmission line approach to model coupled TSV structures. TSVs are embedded in a lossy silicon medium, hence they behave as metal-insulator-semiconductor (MIS) transmission lines. The models we present can accurately capture the transition between slow-wave and dielectric quasi-TEM modes, which are characteristic for MIS transmission lines, as well as the metal-oxide-semiconductor (MOS) varactor capacitance. The results agree well with 2-D quasi-static simulations and 3-D full-wave electromagnetic simulations. The derived equivalent circuit models can easily be applied in circuit simulators to analyze crosstalk behavior of TSVs in a 3-D integrated system.

90 citations