Proceedings ArticleDOI
Predictive effective mobility model for FDSOI transistors using technology parameters
Pragya Kushwaha,Harshit Agarwal,Yogesh Singh Chauhan,Mandar S. Bhoir,Nihar R. Mohapatra,Sourabh Khandelwal,Juan P. Duarte,Yen-Kai Lin,Huan-Lin Chang,Chenming Hu +9 more
- pp 448-451
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TLDR
This is the first time, when a predictive mobility model for wide range of back gate biases, solely dependent on technology parameters (front and back gate oxide thickness T <sub>ox</sub>/<sub>box</sub], threshold voltage V<sub*th</sub>, front/back gate bias V< sub>fg</sub) and flat-band voltage V(sub)fb is proposed.Abstract:
by Pragya Kushwaha, Harshit Agarwal, Mandar Bhoir, Nihar R. Mohapatra, Sourabh Khandelwal, Juan Pablo Duarte, Yen-Kai Lin, Huan-Lin Chang, Chenming hu and Yogesh Singh Chauhanread more
Citations
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Journal ArticleDOI
An Effective Method to Compensate Total Ionizing Dose-Induced Degradation on Double-SOI Structure
Yang Huang,Binhong Li,Xing Zhao,Zhongshan Zheng,Jiantou Gao,Gang Zhang,Bo Li,Guohe Zhang,Kai Tang,Zhengsheng Han,Jiajun Luo +10 more
TL;DR: In this article, double SOI was introduced to mitigate the radiation impact on fully depleted silicon-on-insulator (FDSOI) devices, and the impact of negative back-gate bias to transistor parameter degradation was investigated, and an improved backgate compensation strategy was proposed.
Journal ArticleDOI
Compact Modeling of Drain Current Thermal Noise in FDSOI MOSFETs Including Back-Bias Effect
TL;DR: In this paper, an analytical charge-based model for thermal noise power spectral density in fully depleted silicon on insulator (FDSOI) MOSFETs is presented.
Journal ArticleDOI
New Mobility Model for Accurate Modeling of Transconductance in FDSOI MOSFETs
Yen-Kai Lin,Pragya Kushwaha,Juan Pablo Duarte,Huan-Lin Chang,Harshit Agarwal,Sourabh Khandelwal,Angada B. Sachid,Michael Harter,Josef S. Watts,Yogesh Singh Chauhan,Sayeef Salahuddin,Chenming Hu +11 more
TL;DR: In this paper, anomalous transconductance with nonmono tonic back-gate bias dependence observed in the fully depleted silicon-on-insulator (FDSOI) MOSFET with thick front-gate oxide is discussed.
Journal ArticleDOI
Analog Performance and its Variability in Sub-10 nm Fin-Width FinFETs: a Detailed Analysis
Mandar S. Bhoir,Thomas Chiarella,Lars-Ake Ragnarsson,Jerome Mitard,Valentina Terzeiva,Naoto Horiguchi,Nihar R. Mohapatra +6 more
TL;DR: In this paper, the effects of sub-10nm fin-width scaling on the analog performance and variability of FinFETs have been investigated and a systematic strategy to decouple different variability sources has been discussed and it is shown that mobility, source/drain resistance and oxide thickness are the critical parameters to reduce variability.
Journal ArticleDOI
Effects of Scaling on Analog FoMs of UTBB FD-SOI MOS Transistors: A Detailed Analysis
TL;DR: It is reported that the thin BOX along with higher ground-plane (GP) doping will limit the electron/hole mobility of ultrathin body and BOX fully depleted silicon-on-insulator (UTBB FD-SOI) MOS transistors.
References
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Journal ArticleDOI
Threshold voltage and C-V characteristics of SOI MOSFET's related to Si film thickness variation on SIMOX wafers
TL;DR: In this article, the authors used C-V measurements between the gate and source/drain at two different back-gate voltages, and found a thickness variation of +or-150 AA.
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TL;DR: In this article, a detailed experimental study of the electrical characteristics of ultra-thin body SOI MOSFETs with standard and thin buried oxides and high-k gate dielectric, using an analysis of the transconductance, gate-to-channel capacitance and mobility behaviors at different back-gate biases.
Proceedings ArticleDOI
Statistical variability in scaled generations of n-channel UTB-FD-SOI MOSFETs under the influence of RDF, LER, OTF and MGG
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Journal ArticleDOI
Modeling the impact of substrate depletion in FDSOI MOSFETs
Pragya Kushwaha,Navid Paydavosi,Sourabh Khandelwal,Chandan Yadav,Harshit Agarwal,Juan Pablo Duarte,Chenming Hu,Yogesh Singh Chauhan +7 more
TL;DR: This work modeled the impact of substrate depletion in fully-depleted silicon-on-insulator (FDSOI) transistor and extensively verified the model for both NMOS and PMOS with geometrical and temperature scaling to have an accurate behavior for C–V and I–V characteristics and preserves the smooth behavior of the high order derivatives.