Process Optimization for a Transimpedance Pre-Amplifier Using Self-Aligned GaAs MESFETs on Epitaxial Wafers
16 Jul 2008-pp 439-442
TL;DR: Experiments show that best characteristics for a MESFET can be obtained over a relatively narrow range of annealing temperatures and times than reported for both ohmic and Schottky contacts annealed together.
Abstract: Fabrication of self-aligned n-channel GaAs MESFETs has been carried out for realization of a transimpedance amplifier. The critical process steps e.g. the gate recess etch and ohmic and Schottky contact metallizations have been optimized. The behaviour of ohmic and Schottky contacts with different annealing temperatures and times has been studied. Our experiments show that best characteristics for a MESFET can be obtained over a relatively narrow range of annealing temperatures and times than reported for both ohmic and Schottky contacts annealed together. The variation of etch rates for various window sizes used for gate recess etching of n-GaAs in wet chemical etchant is also studied. Complete fabrication process flow is optimized by studying these effects. A transimpedance preamplifier is fabricated based on the optimized process and characterized.
Citations
More filters
01 Sep 2013
TL;DR: In this article, the Schottky barrier on metal-semiconductor interface is measured using current-voltage (I-V) measurement and annealing temperature is calculated.
Abstract: An interface layer between a metal and a semiconductor, can either be an Ohmic or Schottky contact. Schottky is barrier height defined the rectifying properties of the device. In manufacturing semiconductor devices, Schottky contact on metal-semiconductor interface are essentially for achieving good rectifying properties. In this study, Schottky contact were fabricated on AlGaAs HEMTs structure. An AlGaAs epi wafer was supply by the vendor. AlGaAs substrate was cleaned using wet chemical etching. Electrodes were fabricated through a sequenced of lithography, cleaning, sputtering and lift-off processes. The electrodes were made with metal layers of Ge, Au and Ni. Parameters such as metal thickness and annealing temperatures (from 300oC to 400oC) were vary during fabrication process. Electrical characterizations after annealing are carried out using current-voltage (I-V) measurement are used to calculated Schottky barrier and Ideality Factor. The Schottky barrier increased with increasing annealing temperature until 400°C however Schottky barriers height and Ideality Factor does not varies much with metallization time. The highest Schottky barrier achieved is below 1.0eV with Ideality Factor 5.
Cites background from "Process Optimization for a Transimp..."
...But the Schottky barriers height and Ideality factor is unchanged when the metallization time increase [5]....
[...]
References
More filters
TL;DR: In this article, the effects of controllable processing factors such as the AuGe thickness, the Ni/AuGe thickness ratio, alloy temperature, and alloy time to the characteristics of the ohmic contacts were analyzed.
Abstract: GaAs-based metal-oxide-semiconductor field-effect transistors (MOSFETs) are promising devices for high-speed and high-power applications. One important factor influencing the performance of a GaAs MOSFET is the characteristics of ohmic contacts at the drain and source terminals. In this paper, AuGe-Ni-Au metal contacts fabricated on a thin (930 /spl Aring/) and lightly doped (4/spl times/10/sup 17/ cm/sup -3/) n-type GaAs MOSFET channel layer were studied. The effects of controllable processing factors such as the AuGe thickness, the Ni/AuGe thickness ratio, alloy temperature, and alloy time to the characteristics of the ohmic contacts were analyzed. Contact qualities including specific contact resistance, contact uniformity, and surface morphology were optimized by controlling these processing factors. Using the optimized process conditions, a specific contact resistance of 5.6/spl times/10/sup -6/ /spl Omega//spl middot/cm/sup 2/ was achieved. The deviation of contact resistance and surface roughness were improved to 1.5% and 84 /spl Aring/, respectively. Using the improved ohmic contacts, high-performance GaAs MOSFETs (2 /spl mu/m/spl times/100 /spl mu/m) with a large drain current density (350 mA/mm) and a high transconductance (90 mS/mm) were fabricated.
27 citations
"Process Optimization for a Transimp..." refers background in this paper
...It is reported that any contact and device performance depends to a large extent on the annealing temperature and time [3-5]....
[...]
Journal Article•
TL;DR: In this paper, the Schottky barrier height on Au-Ti/GaAs was 07325 V in accord with mean values on n and p type GaAs (05-08 V).
Abstract: Gallium Arsenide (GaAs) has increasingly become an important compound-semiconductor material suited for high speed digital circuits, microwaves and detectors for high energy physics For the fabrication of ohmic contacts on GaAs (semi-insulating- S1) wafers with characteristics as: Cr doped, (100) oriented, and ρ∼10 6 -10 7 Ωcm, has been used alloyed contact Au-Ge The ohmic film was deposited in a high vacuum chamber (10 - 8 Torr), on a plasma etched surface of GaAs, followed by a rapid thermal annealing (RTA) at 450°C in low vacuum For the fabrication of the rectifying contact- respectively the Schottky diode structure, we have used the same GaAs substrates The wafers were degreased in a standard cleaning procedure, followed by a chemical etching The Au-Ti contact has been deposited by thermal evaporation in vacuum (10 - 6 torr) followed by a RTA procedure at 300-320 °C The carrier transport mechanisms through M/S interface are strongly influenced by the doping concentration in the semiconductor and temperature There are presented the experimental I-V characteristics for selected samples in dark and illumination conditions Schottky barriers height on Au-Ti/GaAs was 07325 V in accord with mean values on n and p type GaAs (05-08 V) The aim of this work is to fabricate a competitive X-ray detector
23 citations
"Process Optimization for a Transimp..." refers background in this paper
...It is reported that any contact and device performance depends to a large extent on the annealing temperature and time [3-5]....
[...]
TL;DR: In this paper, the gain-bandwidth independence available from the transimpedance configuration using a current amplifier as the active element was exploited for photodiode preamplifiers with improved performance through to the microwave region.
Abstract: Photodiode preamplifiers with improved performance through to the microwave region can be designed by exploiting the gain-bandwidth independence available from the transimpedance configuration using a current amplifier as the active element.
10 citations
"Process Optimization for a Transimp..." refers background or methods in this paper
...The basic preamplifier design was taken from [1] and was modified and simulated to meet specific gain and bandwidth requirements....
[...]
...Transimpedance amplifiers are widely used in optical communication circuits to amplify the weak output current of the photodetector [1]....
[...]
IBM1
TL;DR: The applicability of various device types to large scale digital systems in spite of processing complexity, high cost or other negative attributes which hinder digital applications is discussed.
Abstract: In the last few years there has been a proliferation of new device types which are touted as being capable of ever higher speed, and ring oscillators built with many of these devices have achieved delays of ten to a few tens of picoseconds. This paper discusses the applicability of various device types to large scale digital systems. We will not be discussing the world of front end and other small scale applications in which raw performance or some other key device parameter can be used to advantage in spite of processing complexity, high cost or other negative attributes which hinder digital applications. Examples of the sort of application we are not considering include digital and radio frequency front ends. Clearly it eases the problem of exotic technology introduction if such applications exist.
5 citations
"Process Optimization for a Transimp..." refers background in this paper
...GaAs MESFET is an inherently faster device than silicon MOSFET and has a higher transconductance [2] and is a promising device in terms of speed for both digital applications and broadband communication....
[...]
TL;DR: In this article, the alloying behavior of AuGe ohmic contacts to silicon-doped 〈100〉 oriented n-type GaAs substrates was examined using X-ray photoelectron spectroscopies.
Abstract: UV(He I) and X-ray photoelectron spectroscopies (UPS and XPS) were used to examine the alloying behavior of AuGe ohmic contacts to silicon-doped 〈100〉 oriented n-type GaAs substrates. The reacted interface was then revealed by Ar ion sputter depth profiling at room temperature and after annealing in ultra high vacuum at 300°, 500°, or 700°C. The indiffusion of Au and the outdiffusion of Ga and As are evident. Instead of obtaining a maximum peak of the Ge profile on annealing in forming gas, we observed an increase of Ge indiffusion with temperature. The Au indiffusion results in a decrease in the Au 5d splitting and a shift of both levels to higher binding energy. Au-Ga alloy formation is indicated by the Au 4f levels, and is further supported by the observation of the metallic Ga peak. It has been concluded that the sample annealed at 500°C forms the Au-Ga alloy and the compound of As containing Ge more easily than the samples annealed at 300° or 700°C. This result is consistent with the observations of low contact resistance at the annealing temperature of ∼ 500°C for AuNiGe ohmic contacts to n-type GaAs.
4 citations
"Process Optimization for a Transimp..." refers background in this paper
...It is reported that any contact and device performance depends to a large extent on the annealing temperature and time [3-5]....
[...]