Real time implementation and optmization of MP3 decoder on DSP
04 May 2008-pp 000699-000702
TL;DR: Data structure layout, proficient data placement and data memory/cache handling for porting MP3 decoder for effective implementation of MP3 modules to reduce the MIPS is discussed.
Abstract: Porting MP3 decoder effectively on a given hardware platform ADSP-BF533 EZ KITLITE is discussed in this paper [1]. Data structure layout, proficient data placement and data memory/cache handling for porting MP3 decoder are discussed. Hardware features and advanced instructions are availed for effective implementation of MP3 modules to reduce the MIPS. Results show MP3 decoder implementation consumes 24 MIPS peak.
Citations
More filters
29 Nov 2010
TL;DR: The Huffman and the IMDCT hardware accelerator module are developed to accelerate the decoding process and the test results show that MP3 / AAC decoder could reach realtime processing when the Power PC runs at the frequency of 300MHz.
Abstract: This paper presents a MP3 / AAC decoder with hardware and software co-design method. In this method, both the flexibility of the software design and the lower power consumption and higher speed of the hardware design are considered. Based on the analysis of algorithm complexity and the compatibility, the Huffman and the IMDCT hardware accelerator module are developed to accelerate the decoding process. At the same time, the fast algorithms adopted in the hardware accelerators have good expandability. The MP3 / AAC decoder is implemented and verified on Xilinx XUP VIIP board. The test results show that MP3 / AAC decoder could reach realtime processing when the Power PC runs at the frequency of 300MHz.
2 citations
Cites methods from "Real time implementation and optmiz..."
...The advantages of software decoder based on the PC or DSP involve flexible design, short development cycle and little restriction of the platform due to the latest PC hardware resources and the powerful software development tools[5] - [6]....
[...]
01 Jan 2017
TL;DR: Basic performances and architecture of the modern digital signal processor are described in detail with emphasis on the most common applications.
Abstract: Digital signal processor has found its role in various fields of science and technology. With the appearance of problems related to the processing of large quantities of data in real time, it was necessary to develop a system that will execute procedures very fast and with less cost. The most common application in real time is digitization and mathematical processing of audio, video, temperature, voltage etc., resolved using parallel operations. Various producers of digital signal processors have developed processors and evaluation models that enable developers to quickly and efficiently create unique applications in communications and visual systems, biomedicine, meteorology etc. In this article, basic performances and architecture of the modern digital signal processor are described in detail with emphasis on the most common applications. A practical example of the use of the digital signal processor for numerical integration is presented. A comparison with commonly used processors is performed to confirm its efficiency.
2 citations
Cites background from "Real time implementation and optmiz..."
...Blackfin Optimization of MP3 decoder, [17]; audio equalizer, [18], driver fatigue detection system, [19], [20]; fuzzy logic controller, [21], guitar effectors [22], H....
[...]
TL;DR: Some interface functions of the open source high quality MPEG audio decoder library (MAD) based on the Mediastreamer2 structure are modified and the MP3 player system can support the normal playing of the local audio files at the same time of decoding.
Abstract: Conference Name:3rd International Conference on Materials Science and Information Technology, MSIT 2013. Conference Address: Nanjing, Jiangsu, China. Time:September 14, 2013 - September 15, 2013.
1 citations
Cites background from "Real time implementation and optmiz..."
...MP3 is a compressing standard of high quality music[1]....
[...]
01 Jan 2012
TL;DR: The challenges and optimization techniques useful for implementing the MP3 decoder algorithm on the RISC-based ARM processor are described.
Abstract: This paper proposes implementation of MP3 decoder on processor core. Due to the high cost of ASIC, FPGA chips, MP3 decoders are mostly implemented through software rather than hardware. This makes it necessary and demanding to implement and optimize the MP3 decoder for a given platform. This paper describes the challenges and optimization techniques useful for implementing the MP3 decoder algorithm on the RISC-based ARM processor. The goals for this work have been the following: One goal has been to compile an introduction to the subject of MP3 encoding and decoding as well as psychoacoustics. Another goal has been to search for algorithms that can be used to implement the most demanding components of an MP3 decoder. A third goal is to evaluate their performance with regard to speed, memory requirements, and complexity by implementing it on hardware.
References
More filters
01 Jan 2002
TL;DR: This paper will answer questions about how the MPEG-1 Layer III is capable of reduc ing the bit rate with a factor of 12 without almost any audible degradation and give further additional detailed information.
Abstract: Since the MPEG-1 Layer III encoding technology is nowadays widely used it might be interesting to gain knowledge of how this powerful compression/decompression scheme actually functions. How come the MPEG-1 Layer III is capable of reduc ing the bit rate with a factor of 12 without almost any audible degradation? Would it be fairly easy to implement this encoding algorithm? This paper will answer these questions and give further additional detailed information.
25 citations
Additional excerpts
...Index Terms— DSP, MP3, Decoder, Optimization...
[...]