Real-Time SoC Security against Passive Threats Using Crypsis Behavior of Geckos
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Cites background from "Real-Time SoC Security against Pass..."
...Mitigating passive threats via on-chip self-awareness was demonstrated in Guha et al. (2015, 2017b)....
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...…various phases of Very Large Scale Integration (VLSI) design across This article is an extended version of a previously published conference research paper from the 30th International Conference on VLSI Design and the 16th International Conference on Embedded Systems (VLSID’17) (Guha et al. 2017a)....
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...However, for causing an infinite delay, the payload may be composed of a simple loop architecture with a buffer inside, where for each operation, one unit of delay is caused and the progress is never made (Guha et al. 2017a)....
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...Other than outsourcing the various phases of Very Large Scale Integration (VLSI) design across This article is an extended version of a previously published conference research paper from the 30th International Conference on VLSI Design and the 16th International Conference on Embedded Systems (VLSID’17) (Guha et al. 2017a)....
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...Passive threats affect the confidentiality of the system (e.g., leakage of secret information) (Guha et al. 2017b)....
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6 citations
Cites background from "Real-Time SoC Security against Pass..."
...hardware Trojan is small, the increase in the side-channel parameters is too small to detect [14]....
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...However, the side-channel-based techniques are ineffective when the size of the hardware Trojans is negligible when compared to the size of the SoC [14]....
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