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Journal ArticleDOI

Real-Time SoC Security against Passive Threats Using Crypsis Behavior of Geckos

TL;DR: This work seeks refuge to the crypsis behavior exhibited by geckos in nature to generate a runtime security technique for SoC architectures, which can bypass runtime passive threats of a HTH.
Abstract: The rapid evolution of the embedded era has witnessed globalization for the design of SoC architectures in the semiconductor design industry. Though issues of cost and stringent marketing deadlines have been resolved in such a methodology, yet the root of hardware trust has been evicted. Malicious circuitry, a.k.a. Hardware Trojan Horse (HTH), is inserted by adversaries in the less trusted phases of design. A HTH remains dormant during testing but gets triggered at runtime to cause sudden active and passive attacks. In this work, we focus on the runtime passive threats based on the parameter delay. Nature-inspired algorithms offer an alternative to the conventional techniques for solving complex problems in the domain of computer science. However, most are optimization techniques and none is dedicated to security. We seek refuge to the crypsis behavior exhibited by geckos in nature to generate a runtime security technique for SoC architectures, which can bypass runtime passive threats of a HTH. An adaptive security intellectual property (IP) that works on the proposed security principles is designed. Embedded timing analysis is used for experimental validation. Low area and power overhead of our proposed security IP over standard benchmarks and practical crypto SoC architectures as obtained in experimental results supports its applicability for practical implementations.
Citations
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Journal ArticleDOI
TL;DR: This work explores how power draining ability of HTHs may reduce lifetime of the system and an offline–online scheduling strategy is proposed for periodic tasks which can ensure reliability of their operations till the expected lifetime ofThe system.
Abstract: The present era has witnessed deployment of reconfigurable hardware or field-programmable gate arrays (FPGAs) in diverse domains like automation and avionics, which are cyber physical in nature. Such cyber physical systems are associated with strict power budgets. Efficient real-time task-scheduling strategies exist that ensure execution of maximum number of tasks within the power budget. However, these do not consider hardware threats into account. Recent literature has exposed the existence of hardware trojan horses (HTHs). HTHs are malicious circuitry that remain dormant during testing and evade detection, but get activated at runtime to jeopardize operations. HTHs can be etched into the FPGA fabric by adversaries in the untrustworthy foundries, during fabrication of the FPGAs. Even vendors selling reconfigurable intellectual properties or bitstreams that configure the FPGA fabric for task operation may insert HTHs during writing the bitstream codes. HTHs may cause a variety of attacks which may affect the basic security primitives of the system like its integrity, confidentiality or availability. In this work, we explore how power draining ability of HTHs may reduce lifetime of the system. A self-aware approach is also proposed which detects the affected resources of the system and eradicates their use in future to facilitate system reliability. An offline–online scheduling strategy is proposed for periodic tasks which can ensure reliability of their operations till the expected lifetime of the system. Accommodating non-periodic tasks in the periodic task schedule based on available power is also focused. For experimentation, we consider tasks associated with EPFL benchmarks and demonstrate results based on the metric task success rate for periodic tasks and metric task rejection rate for non-periodic tasks.

9 citations

Journal ArticleDOI
TL;DR: Self-aware security modules attached with each IP works based on the Observe-Decide-Act paradigm and not only detects vulnerability but also organizes behavior of the IPs dynamically at runtime so that the high-level objective of task completion before a deadline is ensured.
Abstract: The semiconductor design industry of the embedded era has embraced the globalization strategy for system on chip (SoC) design. This involves incorporation of various SoC components or intellectual properties (IPs), procured from various third-party IP (3PIP) vendors. However, trust of an SoC is challenged when a supplied IP is counterfeit or implanted with a Hardware Trojan Horse. Both roots of untrust may result in sudden performance degradation at runtime. None of the existing hardware security approaches organize the behavior of the IPs at the low level, to ensure timely completion of SoC operations. However, real-time SoC operations are always associated with a deadline, and a deadline miss due to sudden performance degradation of any of the IPs may jeopardize mission-critical applications. We seek refuge to the stigmergic behavior exhibited in insect colonies to propose a decentralized self-aware security approach. The self-aware security modules attached with each IP works based on the Observe-Decide-Act paradigm and not only detects vulnerability but also organizes behavior of the IPs dynamically at runtime so that the high-level objective of task completion before a deadline is ensured. Experimental validation and low overhead of our proposed security modules over various benchmark IPs and crypto SoCs depict the prospects of our proposed mechanism.

7 citations


Cites background from "Real-Time SoC Security against Pass..."

  • ...Mitigating passive threats via on-chip self-awareness was demonstrated in Guha et al. (2015, 2017b)....

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  • ...…various phases of Very Large Scale Integration (VLSI) design across This article is an extended version of a previously published conference research paper from the 30th International Conference on VLSI Design and the 16th International Conference on Embedded Systems (VLSID’17) (Guha et al. 2017a)....

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  • ...However, for causing an infinite delay, the payload may be composed of a simple loop architecture with a buffer inside, where for each operation, one unit of delay is caused and the progress is never made (Guha et al. 2017a)....

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  • ...Other than outsourcing the various phases of Very Large Scale Integration (VLSI) design across This article is an extended version of a previously published conference research paper from the 30th International Conference on VLSI Design and the 16th International Conference on Embedded Systems (VLSID’17) (Guha et al. 2017a)....

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  • ...Passive threats affect the confidentiality of the system (e.g., leakage of secret information) (Guha et al. 2017b)....

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Journal ArticleDOI
TL;DR: PMPGuard, a mechanism that detects the presence of hardware Trojans in Third Party Intellectual Property cores of PMPSoCs by continuous monitoring and testing and recovers the system by switching the infected processor core with another one, is presented.
Abstract: Multiprocessor System-on-Chip (MPSoC) has become necessary due to the the billions of transistors available to the designer, the need for fast design turnaround times, and the power wall. Thus, present embedded systems are designed with MPSoCs, and one possible way MPSoCs can be realized is through Pipelined MPSoC (PMPSoC) architectures, which are used in applications from video surveillance to cryptosystems. Hardware Trojans (HTs) on PMPSoCs are a significant concern due to the damage caused by their stealth. An adversary could use HTs to extract secret information (data leakage) to modify functionality/data (functional modification) or make PMPSoCs deny service. In this article, we present PMPGuard, a mechanism that (1) detects the presence of hardware Trojans in Third Party Intellectual Property (3PIP) cores of PMPSoCs by continuous monitoring and testing and (2) recovers the system by switching the infected processor core with another one. We designed, implemented, and tested the system on a commercial cycle accurate multiprocessor simulation environment. Compared to the state-of-the-art system-level techniques that use Triple Modular Redundancy (TMR) and therefore incur at least 3× area and power overheads, our proposed system incurs about 2× area and 1.5× power overheads without any adverse impact on throughput.

6 citations


Cites background from "Real-Time SoC Security against Pass..."

  • ...hardware Trojan is small, the increase in the side-channel parameters is too small to detect [14]....

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  • ...However, the side-channel-based techniques are ineffective when the size of the hardware Trojans is negligible when compared to the size of the SoC [14]....

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Book ChapterDOI
28 Jun 2018
TL;DR: A self aware approach for facilitating runtime security from integrity attacks or erroneous result generation due to HTHs is proposed, which overcomes the limitations of the existing redundancy based approach.
Abstract: Globalization of the modern semiconductor design industry has evicted the hardware root of trust. Security principles are compromised at runtime due to the implantation of malicious circuitry or Hardware Trojan Horse (HTH) in the vulnerable stages of System on Chip (SoC) design, from less trusted third parties. Runtime security from integrity attacks or erroneous result generation due to HTHs is the focus of this work. The prevailing techniques adopt a redundancy based approach. Several limitations are associated with the redundancy based approach like inability to perform multitasking in a multitasking environment, inability to adapt to aging, use of fault diagnosis even in normal scenario and severe overhead in area and power. Incorporation of observe, decide and act (ODA) paradigm in the design of a SoC makes it self aware. We propose a self aware approach for facilitating runtime security, which overcomes the limitations of the existing redundancy based approach. Low overhead in area and power and better throughput than the redundancy based approaches as observed in experimental results aid its application for practical scenarios.

4 citations

Proceedings ArticleDOI
16 Nov 2020
TL;DR: In this paper, the authors analyze how vulnerability in hardware like hardware trojan horses (HTH) can increment power dissipation suddenly at runtime, without affecting the basic security primitives like integrity, confidentiality or availability of the system.
Abstract: Deployment of reconfigurable hardware or field programmable gate arrays (FPGAs) in cloud platforms is the modern trend. Practical scenarios include Amazon’s EC2 F1 cloud services, Microsoft’s Project Catapult and many others. Efficient task scheduling algorithms exist that can ensure green computing, i.e. order the operation of user tasks in the available FPGAs in such a manner that the power dissipated is optimum. But recent literature has exhibited eradication of the hardware root of trust, which is not taken into account by the existing task scheduling algorithms that can facilitate green computing. In this work, we analyze how vulnerability in hardware like hardware trojan horses (HTH) can increment power dissipation suddenly at runtime, without affecting the basic security primitives like integrity, confidentiality or availability of the system. Thus, are difficult to detect but may hamper the system due to unnecessary high power dissipation. We also develop a suitable runtime task scheduling algorithm which schedules the tasks at runtime based on the dynamic status of the resources, such that the power dissipation incurred at runtime is optimum. Finally, we also propose a mechanism via which we can detect affected cloud resources based on the runtime operations. We validate our proposed methodology via simulation based experiments.

1 citations

References
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Journal ArticleDOI
TL;DR: Simulation results show that the proposed method achieves higher probability of Trojan detection over a naive implementation of simple voting on the output of different IP cores, and requires less hardware overhead when compared with a simple voting technique achieving the same degree of security.

26 citations


"Real-Time SoC Security against Pass..." refers background or methods in this paper

  • ...Active threats relate to the scenario where the system suddenly malperforms by producing erroneous results or no results in a perfectly fine operating environment [Amin et al. 2014; McIntyre et al. 2009]....

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  • ...2009] or a weighted voting technique [Amin et al. 2014] where the majority result is selected for output generation....

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  • ...The output is chosen with the aid of a comparison technique [McIntyre et al. 2009] or a weighted voting technique [Amin et al. 2014] where the majority result is selected for output generation....

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  • ...2009] or a weighted voting methodology [Amin et al. 2014] is utilized to select the majority result for output generation....

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  • ...A comparison technique [McIntyre et al. 2009] or a weighted voting methodology [Amin et al. 2014] is utilized to select the majority result for output generation....

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Journal ArticleDOI
TL;DR: It seems likely that photoreception by visual pigment which is sensitive to light at wavelengths of 410-420 nm increases PDE activity, probably via a G-protein, such as occurs with visual cells in the retina, which causes a decrease in levels of cytosolic cAMP, in turn leading to pigment aggregation within medaka xanthophores.
Abstract: The response mechanism of medaka xanthophores to light was examined at the cellular level. Innervated and denervated xanthophores of adult medakas responded to light (9,000 lux) within 30 sec by pigment aggregation, and this aggregation was not mediated through alpha-adrenoceptors on the cell membrane. Maximum sensitivity to light was at wavelengths of 410-420 nm, and the direct effect of light was reversible. Xanthophore responsiveness to light in summer was higher than that in winter. Ca2+ and calmodulin were not involved in the response, but rather, an important role for cAMP and phosphodiesterase (PDE) was suggested. It seems likely that photoreception by visual pigment which is sensitive to light at wavelengths of 410-420 nm increases PDE activity, probably via a G-protein, such as occurs with visual cells in the retina, which causes a decrease in levels of cytosolic cAMP, in turn leading to pigment aggregation within medaka xanthophores.

23 citations


"Real-Time SoC Security against Pass..." refers background in this paper

  • ...Many researchers associate it as a secondary response where the nervous or endocrine system of the organism is involved, while others attribute it as a primary response where special dedicated cells are present for cryptic coloration [Oshima et al. 1998]....

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  • ...Crypsis can be either a primary or a secondary response [Oshima et al. 1998; Fulgione et al. 2014]....

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Journal ArticleDOI
TL;DR: This study yields the first evidence of crypsis mediated by dermal light sensitivity in amniotes, and suggests that T. mauritanica skin melanophores are able to activate a process of colour change autonomously.
Abstract: Concealment by means of colour change is a pre-eminent deceptive mechanism used by both predators and prey. The moorish gecko Tarentola mauritanica is able to blend into the background by either darkening or paling according to the substrate darkness. Here we examined the functioning of background perception in moorish gecko. We experimentally excluded the involvement of melanophorestimulating hormone in camouflage. Blindfolded individuals change their colour consistently with the background. Surprisingly, individuals with covered flanks were not able to change colour, no matter whether they were allowed to see the substrate or not. Accordingly, we found high levels of opsin transcript and protein in the flank region of the gecko. These observations suggest that T. mauritanica skin melanophores are able to activate a process of colour change autonomously. This study yields the first evidence of crypsis mediated by dermal light sensitivity in amniotes.

23 citations


"Real-Time SoC Security against Pass..." refers background in this paper

  • ...Crypsis can be either a primary or a secondary response [Oshima et al. 1998; Fulgione et al. 2014]....

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  • ...However, we choose crypsis in geckos due to the fact that only the light-sensitive skin cells are primarily involved for crypsis in geckos [Fulgione et al. 2014]....

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  • ...This stimulus involves the activation of melanophores via alpha-melanophore-stimulating hormone (α-MSH), effecting learning of the new state of the environment by geckos [Fulgione et al. 2014]....

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  • ...However, a recent study reveals that special light-sensitive cells are present on the skin of a gecko that are responsible for its crypsis [Fulgione et al. 2014]....

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  • ...Synchronizing its parameters to the parameters of its surroundings or updating its existing state with the change in environment facilitates the organism to bypass its threats and evolve in nature [Fulgione et al. 2014; Vroonen et al. 2012]....

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Proceedings ArticleDOI
18 Jul 2010
TL;DR: A binary version of the Particle Swarm Optimization meta-heuristic approach is applied to solve the system-level fault diagnosis problem (BPSO-FD) under the invalidation and comparison diagnosis models and, according to the empirical results, quickly and reliably identifies the true ensemble of faulty units and scales well for large parallel and distributed systems.
Abstract: The efficient diagnosis of hardware and software faults in parallel and distributed systems remains a challenge in today's most prolific decentralized environments. System-level fault diagnosis is concerned with the identification of all faulty components among a set of hundreds (or even thousands) of interconnected units, usually by thoroughly examining a collection of test outcomes carried out by the nodes under a specific test model. This task has non-polynomial complexity and can be posed as a combinatorial optimization problem. Here, we apply a binary version of the Particle Swarm Optimization meta-heuristic approach to solve the system-level fault diagnosis problem (BPSO-FD) under the invalidation and comparison diagnosis models. Our method is computationally simpler than those already published in literature and, according to our empirical results, BPSO-FD quickly and reliably identifies the true ensemble of faulty units and scales well for large parallel and distributed systems.

16 citations

Proceedings ArticleDOI
26 Jun 2015
TL;DR: An intelligent architecture, Runtime Trust Neural Architecture (RTNA) based on Adaptive Resonance Theory (ART 1) neural network, which when incorporated with the SOC architecture can prevent it at runtime from being compromised confidentially.
Abstract: With the entry into the embedded domain, security of SOC architectures has become an arena of importance. However, complexity and cost factors have forced us to outsource the VLSI design phases across the globe. Such sites may not be trusted and threat lies in the introduction of malicious intrusions at any stage of the design flow. Such malicious intrusions, also known as Hardware Trojan Horses (HTH) remain dormant during the testing phase but get triggered at runtime and threaten the integrity and confidentiality of the chip. In this paper, we focus on threat to confidentiality. HTH threatens the confidentiality of such chips by leaking the secret information at runtime. We propose an intelligent architecture, Runtime Trust Neural Architecture (RTNA) based on Adaptive Resonance Theory (ART 1) neural network, which when incorporated with the SOC architecture can prevent it at runtime from being compromised confidentially. Low area and low power overhead of our proposed RTNA on practical crypto SOC architectures as obtained in the experimental results confirm its practical implementation. Hardware implementation of trust generation at runtime, use of unsupervised learning and use of an intelligent architecture are the novelties of this work.

13 citations


"Real-Time SoC Security against Pass..." refers methods in this paper

  • ...Nature-inspired algorithms offer an alternative to the conventional techniques for solving complex problems in the domain of computer science....

    [...]

  • ...In this strategy of This is an extended version of a previously published conference research paper [Guha et al. 2015]....

    [...]