Journal ArticleDOI
Scaling the Si MOSFET: from bulk to SOI to bulk
R.-H. Yan,Abbas Ourmazd,K.F. Lee +2 more
Reads0
Chats0
TLDR
In this article, the scaling of fully depleted SOI devices is considered and the concept of controlling horizontal leakage through vertical structures is highlighted, and several structural variations of conventional SOI structures are discussed in terms of a natural length scale to guide the design.Abstract:
Scaling the Si MOSFET is reconsidered. Requirements on subthreshold leakage control force conventional scaling to use high doping as the device dimension penetrates into the deep-submicrometer regime, leading to an undesirably large junction capacitance and degraded mobility. By studying the scaling of fully depleted SOI devices, the important concept of controlling horizontal leakage through vertical structures is highlighted. Several structural variations of conventional SOI structures are discussed in terms of a natural length scale to guide the design. The concept of vertical doping engineering can also be realized in bulk Si to obtain good subthreshold characteristics without large junction capacitance or heavy channel doping. >read more
Citations
More filters
Journal ArticleDOI
Phosphorene: An Unexplored 2D Semiconductor with a High Hole Mobility
TL;DR: In this paper, the 2D counterpart of layered black phosphorus, which is called phosphorene, is introduced as an unexplored p-type semiconducting material and the authors find that the band gap is direct, depends on the number of layers and the in-layer strain, and significantly larger than the bulk value of 0.31-0.36 eV.
Journal ArticleDOI
Progress, Challenges, and Opportunities in Two-Dimensional Materials Beyond Graphene
Sheneve Z. Butler,Shawna M. Hollen,Linyou Cao,Yi Cui,Yi Cui,Jay Gupta,Humberto R. Gutierrez,Tony F. Heinz,Seung Sae Hong,Seung Sae Hong,Jiaxing Huang,Ariel Ismach,Ezekiel Johnston-Halperin,Masaru Kuno,Vladimir V. Plashnitsa,Richard D. Robinson,Rodney S. Ruoff,Sayeef Salahuddin,Jie Shan,Li Shi,Michael G. Spencer,Mauricio Terrones,Wolfgang Windl,Joshua E. Goldberger +23 more
TL;DR: The properties and advantages of single-, few-, and many-layer 2D materials in field-effect transistors, spin- and valley-tronics, thermoelectrics, and topological insulators, among many other applications are highlighted.
Journal ArticleDOI
Phosphorene: A New 2D Material with High Carrier Mobility
TL;DR: In this article, a few-layer phosphorene has been introduced as a 2D p-type material for electronic applications, which has an inherent, direct and appreciable band gap that depends on the number of layers.
Phosphorene: An Unexplored 2D Semiconductor with a High Hole
TL;DR: The found phosphorene to be stable and to have an inherent, direct, and appreciable band gap, which depends on the number of layers and the in-layer strain, and is significantly larger than the bulk value of 0.31-0.36 eV.
Journal ArticleDOI
Device scaling limits of Si MOSFETs and their application dependencies
TL;DR: The end result is that there is no single end point for scaling, but that instead there are many end points, each optimally adapted to its particular applications.
References
More filters
Journal ArticleDOI
Design of ion-implanted MOSFET's with very small physical dimensions
TL;DR: This paper considers the design, fabrication, and characterization of very small Mosfet switching devices suitable for digital integrated circuits, using dimensions of the order of 1 /spl mu/.
Journal ArticleDOI
Short-channel effect in fully depleted SOI MOSFETs
TL;DR: In this article, the short channel effect in fully depleted silicon-on-insulator MOSFETs has been studied by a two-dimensional analytical model and by computer simulation, and it is found that the vertical field through the depleted film strongly influences the lateral field across the source and drain regions.
Journal ArticleDOI
Generalized scaling theory and its application to a ¼ micrometer MOSFET design
TL;DR: In this paper, a generalized scaling theory was proposed to allow for independent scaling of the FET physical dimensions and applied voltages, while still maintaining constant the shape of the electric field pattern.
Proceedings ArticleDOI
Silicon-on-insulator 'gate-all-around device'
TL;DR: In this paper, the authors describe the process fabrication and the electrical characteristics of an SOI MOSFET with gate oxide and a gate electrode not only on top of the active silicon film but also underneath it.