SEFI Protection for Nanosat 16-Bit Chip Onboard Computer Memories

TLDR: Two solutions are presented to protect a nano/pico satellite onboard computer memory prototype with 16-bit data words against SEFIs and SEUs and the approach to provide the error-correction capabilities is based on orthogonal latin square codes.

Abstract: Plans to launch miniaturized satellite missions have been increasing in the last few years. Space missions like these are exposed to radiation, which is a cause of errors in electronic systems. Memories are one of the electronic systems that need special attention. Radiation effects in memories include single-event upsets (SEUs), multiple cell upsets, and single-event functional interrupts (SEFIs). In this paper, two solutions are presented to protect a nano/pico satellite onboard computer memory prototype with 16-bit data words against SEFIs and SEUs. The prototype uses a 32-bit memory interface, organized in two 16-bit chips. The approach to provide the error-correction capabilities is based on orthogonal latin square codes. The results show that the area and delay introduced by the solutions are acceptable. When a SEFI affects one of the chips, the solutions are able to recover the information using the remaining data.