Sehwa: a software package for synthesis of pipelines from behavioral specifications
01 Mar 1988-IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (IEEE)-Vol. 7, Iss: 3, pp 356-370
TL;DR: Sehwa can find the minimum-cost design, the highest performance design, and other designs between these two in the design space and executes within minutes, for problems of practical size, on a VAX 11/750.
Abstract: A set of techniques for the synthesis of pipelined data paths is described, and Sehwa, a program that performs such synthesis, is presented. The task includes the generation of data paths from a data-flow graph along with a clocking scheme that overlaps execution of multiple tasks. Some design examples are given. Sehwa can find the minimum-cost design, the highest performance design, and other designs between these two in the design space. Sehwa is written in Franz Lisp and executes within minutes, for problems of practical size, on a VAX 11/750. >
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01 Feb 1990
TL;DR: It is shown how the high-level synthesis task can be decomposed into a number of distinct but not independent subtasks.
Abstract: High-level synthesis systems start with an abstract behavioral specification of a digital system and find a register-transfer level structure that realizes the given behavior. The various tasks involved in developing a register-transfer level structure from an algorithmic level specification are described. In particular, it is shown how the high-level synthesis task can be decomposed into a number of distinct but not independent subtasks. The techniques that have been developed for solving those subtasks are presented. Areas related to high-level synthesis that are still open problems are examined. >
639 citations
TL;DR: An integer linear programming (ILP) model for the scheduling problem in high-level synthesis is presented and a scheduling problem called feasible scheduling, which provides a paradigm for exploring the solution space, is constructed.
Abstract: An integer linear programming (ILP) model for the scheduling problem in high-level synthesis is presented. In addition to time-constrained scheduling and resource-constrained scheduling, a scheduling problem called feasible scheduling, which provides a paradigm for exploring the solution space, is constructed. Extensive consideration is given to the following applications: scheduling with chaining, multicycle operations by nonpipelined function units, and multicycle operations by pipelined function units; functional pipelining; loop folding; mutually exclusive operations; scheduling under bus constraint; and minimizing lifetimes of variables. The complexity of the number of variables in the formulation is O(s*n) where s and n are the number of control steps and operations, respectively. Since the as soon as possible (ASAP), as late as possible (ALAP), and list scheduling techniques are used to reduce the solution space, the formulation becomes very efficient. A solution to a practical problem, such as the fifth-order filter, can be found optimally in a few seconds. >
434 citations
Patent•
01 Nov 1996TL;DR: In this article, a methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications is described, which uses a systematic technique to map and enforce consistency of the semantics imbedded in the original, highlevel descriptions.
Abstract: A methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications is disclosed. The methodology uses a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is essentially a series of transformations operating upon various levels of design representations. At each level, the intended meaning (semantics) and formal software manipulations are captured to derive a more detailed level describing hardware meeting the design goals. Important features of the methodology are: capturing the users concepts, intent, specification, descriptions, constraints and trade-offs; architectural partitioning; what-if analysis at a high level; sizing estimation; timing estimation; architectural trade-off; conceptual design with implementation estimation; and timing closure. The methodology includes using estimators, based on data gathered over a number of realized designs, for partitioning and evaluating a design prior to logic synthesis. From the structural description, a physical implementation of the device is readily realized. Techniques are described for estimating ancillary parameters of the device (such as device cost, production speed, production lead time, etc.), at early, high level stages of the design process (e.g., at the system, behavioral, and register transfer level stages). The techniques can be applied to optimize the design characteristics other than measurable physical characteristics, such as those deriving from project time and cost constraints.
322 citations
01 Jun 1988
TL;DR: This tutorial examines the high-level synthesis task, showing how it can be decomposed into a number of distinct but not independent subtasks, and presents the techniques that have been developed for solving those subtasks.
Abstract: High-level synthesis takes an abstract behavioral specification of a digital system and finds a register-transfer level structure that realizes the given behavior. In this tutorial we will examine the high-level synthesis task, showing how it can be decomposed into a number of distinct but not independent subtasks. Then we will present the techniques that have been developed for solving those subtasks. Finally, we will note those areas related to high-level synthesis that are still open problems.
300 citations
TL;DR: Experimental results show that using four supply voltage levels on a number of standard benchmarks, an average energy saving of 53% can be obtained compared to using one xed supply voltage level.
Abstract: We present a dynamic programming technique for solving the multiple supply voltage scheduling problem in both nonpipelined and functionally pipelined data-paths. The scheduling problem refers to the assignment of a supply voltage level (selected from a fixed and known number of voltage levels) to each operation in a data flow graph so as to minimize the average energy consumption for given computation time or throughput constraints or both. The energy model is accurate and accounts for the input pattern dependencies, re-convergent fanout induced dependencies, and the energy cost of level shifters. Experimental results show that using three supply voltage levels on a number of standard benchmarks, an average energy saving of 40.19% (with a computation time constraint of 1.5 times the critical path delay) can be obtained compared to using a single supply voltage level.
300 citations
Cites methods from "Sehwa: a software package for synth..."
...An algorithm for performing scheduling and allocation for functionally pipelined DFG’s is described in [16]....
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References
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09 Apr 1974
TL;DR: The language is being used as a model for study of fundamental semantic constructs for programming, as a target language for evaluating trans-latability of programs expressed at the user-language level, and as a guide for research in advanced computer architecture.
Abstract: A language for representing computational procedures based on the concept of data flow is presented in terms of a semantic model that permits concurrent execution of noninterfering program parts. Procedures in the language operate on elementary and structured values, and always define functional transformations of values. The language is equivalent in expressive power to a block structured language with internal procedure variables and is a generalization of pure Lisp. The language is being used as a model for study of fundamental semantic constructs for programming, as a target language for evaluating trans-latability of programs expressed at the user-language level, and as a guide for research in advanced computer architecture.
682 citations
TL;DR: Data flow languages form a subclass of the languages which are based primarily upon function application and graphical representations and their applications are the subject of this article.
Abstract: The advantages of each are discussed here. fi Data Flow Program Graphs Data flow languages form a subclass of the languages which are based primarily upon function application (i.e., applicative languages). By data flow language we mean any applicative language based entirely upon the notion of data flowing from one function entity to another or any language that directly supports such flowing. This flow concept gives data flow languages the advantage of allowing program definitions to be represented exclusively by graphs. Graphical representations and their applications are the subject of this article. Applicative languages provide the benefits of extreme modularity, in that the function of each of several sub-programs that execute concurrently can be understood in vacuo. Therefore, the programmer need not assimilate a great deal of information about the environment of the subprogram in order to understand it. In these languages, there is no way to express constructs that produce global side-effects. This decoupling of the meaning of individual subprograms also makes possible a similar decoupling of their execution. Thus, when represented graphically, sub-programs that look independent can be executed independently and, therefore, concurrently. By contrast, concurrent programs written in more conventional assignment-based languages cannot always be understood in vacuo, since it is often necessary to understand complex sequences of interactions between a sub-program and its environment in order to understand the meaning of the subprogram itself. This is not to say that data flow subprograms cannot interact with their environments in specialized ways, but that it is possible to define a subprogram's meaning without appealing to those interactions. There are many reasons for describing data flow languages in graphical representations, including the following: (1) Data flow languages sequence program actions by a simple data availability firing rule: When a node's arguments are available, it is said to be firable. The function associated with a firable node can be fired, i.e., applied to is arguments, which are thereby absorbed. After firing, the node's results are sent to other functions, which need these results as their arguments. A mental image of this behavior is suggested by representing the program as a directed graph in which each node represents a function and each (directed) arc a conceptual medium over which data items flow. Phantom nodes, drawn with dashed lines, indicate points at which the program communicates with its environment by either receiving data from it or sending data to it. (2) …
317 citations
17 Jan 1976
TL;DR: A methodology is presented for modifying the collision characteristics with the insertion of delays so as to increase the utilization of segments and hence the throughput under appropriate scheduling.
Abstract: A pipeline is defined to be a collection of resources, called segments which can be kept busy simultaneously. A task once initiated, flows from segment to segment for its execution. A collision occurs if two or more tasks attempt to use the same segment at the same time.The collision characteristics of a pipeline with respect to a schedule of task initiations are investigated. A methodology is presented for modifying the collision characteristics with the insertion of delays so as to increase the utilization of segments and hence the throughput under appropriate scheduling.
86 citations
02 Jul 1986
TL;DR: Sehwa is believed to be the first pipelined synthesis program published in the open literature and can find the minimum cost design, the highest performance design, and other designs between these two in the design space.
Abstract: This paper describes a set of techniques for the synthesis of pipelined data paths, and presents Sehwa, a program which performs such synthesis. The task includes the generation of data paths from a data flow graph along with a clocking scheme which overlaps execution of multiple tasks. Some examples which Sehwa has designed are given. Sehwa can find the minimum cost design, the highest performance design, and other designs between these two in the design space. We believe Sehwa to be the first pipelined synthesis program published in the open literature. Sehwa is written in Franz LISP, and executes within minutes for problems of practical size on a VAX 11/750.
82 citations
01 Jun 1985
TL;DR: ADAM is described, an integrated Advanced Design AutoMation system, with focus on the knowledge-based synthesis subsystem, which includes a number of design activities and utilities, and a unified, multidimensional, hierarchical design representation.
Abstract: This paper describes ADAM, an integrated Advanced Design AutoMation system, with focus on the knowledge-based synthesis subsystem. Working parts of this subsystem include a number of design activities and utilities, and a unified, multidimensional, hierarchical design representation. Two aspects of the synthesis subsystem are described in detail: the design planner and the natural language interface. The planner builds a plan for synthesis and analysis activities, drawing inferences from a knowledge base represented by a semantic net. The natural language interface accepts system-level behavioral specifications. Both of these packages are currently being implemented.
72 citations
"Sehwa: a software package for synth..." refers methods in this paper
...This paper describes Sehwa (a Korean name meaning flower of the world), a set of procedures which synthesize pipelined data paths as part of the USC-ADAM system [ 8 ]....
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