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Patent

Selective etching of silicon wafer

B. Peethala1, Spyridon Skordas1, Da Song1, Allan Upham1, Kevin R. Winstel1 
10 Jun 2014-
TL;DR: In this paper, a method of preparing an etch solution and thinning semiconductor wafers using the solution is proposed, which includes steps of creating a mixture of hydrofluoric acid, nitric acid, and acetic acid in a solution container in an approximate 1:3:5 ratio.
Abstract: A method of preparing an etch solution and thinning semiconductor wafers using the etch solution is proposed. The method includes steps of creating a mixture of hydrofluoric acid, nitric acid, and acetic acid in a solution container in an approximate 1:3:5 ratio; causing the mixture to react with portions of one or more silicon wafers, the portions of the one or more silicon wafers are doped with boron in a level no less than 1×10 19 atoms/cm 3 ; collecting the mixture after reacting with the boron doped portions of the one or more silicon wafers; and adding collected mixture back into the solution container to create the etch solution.
Citations
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Patent
02 Feb 2016
TL;DR: In this article, a process for selectively removing a block on one side using a wet etching process in connection with self-assembly block copolymer thin films that have etching-resisting properties different from each other was proposed.
Abstract: The present invention relates to a process for selectively removing a block on one side using a wet etching process in connection with self-assembly block copolymer thin films that have etching-resisting properties different from each other. The present invention can form a vertical nanopore structure having a high aspect ratio, even in the case of a thick film which has a vertically oriented cylinder self-assembly structure and which has one or more periods, by overcoming the limit of the prior art, which cannot implement a vertical pore structure through wet etching.

5 citations

Patent
Kagawa Koji1
22 Nov 2019
TL;DR: In this article, a method of processing a substrate is provided, the method including: a production process of producing B(OH3) or B2O3 by bringing an oxidizing agent into contact with a boron-based film in a substrate in which the Boronbased film is formed on a film including a silicon-based films.
Abstract: There is provided a method of processing a substrate, the method including: a production process of producing B(OH3) or B2O3 by bringing an oxidizing agent into contact with a boron-based film in a substrate in which the boron-based film is formed on a film including a silicon-based film; and a removal process of removing the boron-based film from the substrate by dissolving the B(OH3) or B2O3 produced in the production process in water
Patent
15 Dec 2016
TL;DR: In this paper, a thin-film type solar cell which prevents short circuit from occurring between a first electrode and a second electrode due to a burr produced in a separation part, thereby preventing an output from being reduced.
Abstract: Disclosed is a thin film type solar cell which prevents short circuit from occurring between a first electrode and a second electrode due to a burr produced in a separation part, thereby preventing an output from being reduced. The thin film type solar cell includes a substrate, a first electrode disposed over the substrate and being apart from an adjacent first electrode by a first separation part, a semiconductor layer disposed over the first electrode and being apart from an adjacent semiconductor layer by a contact part and a second separation part, and a second electrode disposed over the semiconductor layer and being apart from an adjacent second electrode by the second separation part. The semiconductor layer contacts the substrate through the first separation part, and the second electrode contacts the first electrode through the contact part. A height of a burr produced in the second separation part is lower than a height between the first electrode and the second electrode.
References
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Journal ArticleDOI
01 Aug 1998
TL;DR: In this article, the available etching methods fall into three categories in terms of the state of the etchant: wet, vapor, and plasma, and they are reviewed and compared by comparing the results, cost, complexity, process compatibility, and other factors.
Abstract: Bulk silicon etching techniques, used to selectively remove silicon from substrates, have been broadly applied in the fabrication of micromachined sensors, actuators, and structures. Despite the more recent emergence of higher resolution, surface-micromachining approaches, the majority of currently shipping silicon sensors are made using bulk etching. Particularly in light of newly introduced dry etching methods compatible with complementary metal-oxide-semiconductors, it is unlikely that bulk micromachining will decrease in popularity in the near future. The available etching methods fall into three categories in terms of the state of the etchant: wet, vapor, and plasma. For each category, the available processes are reviewed and compared in terms of etch results, cost, complexity, process compatibility, and a number of other factors. In addition, several example micromachined structures are presented.

780 citations

Journal ArticleDOI
TL;DR: In this article, the authors focus on the transport and kinetic effects only on acid-based etches, which is traditionally an acidic mixture of HNO 3 1 HF and a diluent or a caustic solution of KOH.
Abstract: Polished silicon wafers are prepared through various mechanical and chemical processes. First, the silicon single-crystal ingot is sliced into circular disks (wafers) by slicing followed by a flattening process called lapping that involves scrubbing the wafers using an abrasive slurry. 1 The mechanical damage induced during the previous shaping processes is removed by etching which is the focus of this paper. Etching is followed by various unit operations such as polishing and cleaning before it is ready for device fabrication. Chemical etching of silicon wafers is accomplished by dipping the wafers in an etchant which is traditionally an acidic mixture of HNO 3 1 HF and a diluent or a caustic solution of KOH. Various studies in caustic crystallographic etching are reported. 2-4 However, this paper focuses on the transport and kinetic effects only on acidbased etches. Acid etching in HNO 3 1 HF mixture is reported to proceed with following global reactions 1 Si 1 4HNO 3 r SiO 2 1 4NO 2 1 2H 2 O [1]

72 citations

Patent
02 Jun 2006
TL;DR: In this article, a method of forming at least one undercut structure in a semiconductor substrate is proposed, which consists of providing a substrate, implanting an impurity in the substrate, and removing the impurity to form at least 1 undercut structure.
Abstract: A method of forming at least one undercut structure in a semiconductor substrate. The method comprises providing a semiconductor substrate, forming at least one doped region in the semiconductor substrate, and removing the at least one doped region to form at least one undercut structure in the semiconductor substrate. The at least one undercut structure may include at least one substantially vertical shelf, at least one substantially horizontal shelf, and at least one faceted surface. The at least one doped region may be formed by implanting an impurity in the semiconductor substrate, which is, optionally, annealed. The at least one doped region may be removed selective to the undoped portion of the semiconductor substrate by at least one of wet etching or dry etching. An intermediate semiconductor structure that comprises a single crystalline silicon substrate and at least one undercut structure formed in the single crystalline silicon substrate is also disclosed.

55 citations

Patent
31 Oct 1985
TL;DR: In this article, an improved etchant composition and method for resistivity specific etching of doped silicon films which overlie intrinsic or lightly doped crystal regions is presented, which leaves no silicon residue.
Abstract: The present invention provides an improved etchant composition and method for the resistivity specific etching of doped silicon films which overlie intrinsic or lightly doped crystal regions. The composition of the etchant is 0.2-6 mole % hydrofluoric acid, 14-28 mole % nitric acid, and 66-86 mole % acetic acid/water. The etchant leaves no silicon residue and provides for controlled etching with an etch stop at the lightly doped or intrinsic region.

52 citations

Patent
06 Dec 1995
TL;DR: In this paper, a method for growing Si-Ge-C epitaxial layer(s) on a substrate, etchants especially suitable for Si--Ge--C etch-stops, and novel methods of use for SiGeC compositions are provided.
Abstract: Silicon-germanium-based compositions comprising silicon, germanium, and carbon (i.e., Si--Ge--C), methods for growing Si--Ge--C epitaxial layer(s) on a substrate, etchants especially suitable for Si--Ge--C etch-stops, and novel methods of use for Si--Ge--C compositions are provided. In particular, the invention relates to Si--Ge--C compositions, especially for use as etch-stops and related processes and etchants useful for microelectronic and nanotechnology fabrication.

36 citations