Patent•
Semiconductor device and method of fabricating same
16 Aug 2004-
TL;DR: In this paper, the TFTs are fabricated using an active layer crystallized by making use of nickel, and the gate electrodes are comprising tantalum, and a heat treatment is performed to getter nickel element in the active layer and to drive it into the source/drain regions.
Abstract: There are disclosed TFTs that have excellent characteristics and can be fabricated with a high yield. The TFTs are fabricated, using an active layer crystallized by making use of nickel. Gate electrodes are comprising tantalum. Phosphorus is introduced into source/drain regions. Then, a heat treatment is performed to getter nickel element in the active layer and to drive it into the source/drain regions. At the same time, the source/drain regions can be annealed out. The gate electrodes of tantalum can withstand this heat treatment.
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Patent•
22 Dec 2004
TL;DR: In this article, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface Hydrogen is introduced into The active layer, a thin film comprising SiO x N y is formed to cover the active layer and then a gate insulating film comprising silicon oxide film formed on the thin film.
Abstract: In fabricating a thin film transistor, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface Hydrogen is introduced into The active layer A thin film comprising SiO x N y is formed to cover the active layer and then a gate insulating film comprising a silicon oxide film formed on the thin film comprising SiO x N y Also, a thin film comprising SiO x N y is formed under the active layer The active layer includes a metal element at a concentration of 1×10 15 to 1×10 19 cm −3 and hydrogen at a concentration of 2×10 19 to 5×10 21 cm −3
719 citations
Patent•
08 Jan 2003
TL;DR: In this paper, an active matrix display (AMD) with pixel electrodes, gate wirings and source wires is proposed, in which pixel electrodes are arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the amount of steps.
Abstract: An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the number of steps. The device comprises a gate electrode and a source wiring on an insulating surface, a first insulating layer on the gate electrode and on the source wiring, a semiconductor layer on the first insulating film, a second insulating layer on the semiconductor film, a gate wiring connected to the gate electrode on the second insulating layer, a connection electrode for connecting the source wiring and the semiconductor layer together, and a pixel electrode connected to the semiconductor layer.
432 citations
Patent•
24 Mar 2011
TL;DR: In this article, the luminance of the EL elements of each in the display pixels is controlled in accordance with the amount of electric current flowing in each of the diodes, which is a function of the environment.
Abstract: To provide a semiconductor display device capable of displaying an image having clarity and a desired color, even when the speed of deterioration of an EL layer is influenced by its environment. Display pixels and sensor pixels of an EL display each have an EL element, and the sensor pixels each have a diode. The luminance of the EL elements of each in the display pixels is controlled in accordance with the amount of electric current flowing in each of the diodes.
334 citations
Patent•
29 Jun 2007
TL;DR: In this article, the authors proposed a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost.
Abstract: An object is to provide a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost A method for manufacturing a semiconductor device includes the following steps: forming a semiconductor film; irradiating a laser beam by passing the laser beam through a photomask including a shield for shielding the laser beam; subliming a region which has been irradiated with the laser beam through a region in which the shield is not formed in the photomask in the semiconductor film; forming an island-shaped semiconductor film in such a way that a region which is not irradiated with the laser beam is not sublimed because it is a region in which the shield is formed in the photomask; forming a first electrode which is one of a source electrode and a drain electrode and a second electrode which is the other one of the source electrode and the drain electrode; forming a gate insulating film; and forming a gate electrode over the gate insulating film
323 citations
Patent•
19 Dec 2000
Abstract: In producing a thin film transistor, after an amorphous silicon film is formed on a substrate, a nickel silicide layer is formed by spin coating with a solution (nickel acetate solution) containing nickel as the metal element which accelerates (promotes) the crystallization of silicon and by heat treating. The nickel silicide layer is selectively patterned to form island-like nickel silicide layer. The amorphous silicon film is patterned. A laser light is irradiated while moving the laser, so that crystal growth occurs from the region in which the nickel silicide layer is formed and a region equivalent to a single crystal (a monodomain region) is obtained.
315 citations
References
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Patent•
22 Dec 2004
TL;DR: In this article, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface Hydrogen is introduced into The active layer, a thin film comprising SiO x N y is formed to cover the active layer and then a gate insulating film comprising silicon oxide film formed on the thin film.
Abstract: In fabricating a thin film transistor, an active layer comprising a silicon semiconductor is formed on a substrate having an insulating surface Hydrogen is introduced into The active layer A thin film comprising SiO x N y is formed to cover the active layer and then a gate insulating film comprising a silicon oxide film formed on the thin film comprising SiO x N y Also, a thin film comprising SiO x N y is formed under the active layer The active layer includes a metal element at a concentration of 1×10 15 to 1×10 19 cm −3 and hydrogen at a concentration of 2×10 19 to 5×10 21 cm −3
719 citations
Patent•
20 Oct 1998
TL;DR: In this paper, a semiconductor wafer of such structure that structures with a low mechanical strength, such as suspended microstructures, are exposed at a surface thereof, detachable adhesive sheet making up protective caps for the respective suspended micro structures are formed over the semiconductor Wafer.
Abstract: A semiconductor wafer, which can be divided into chips at a high yield and a low cost and easily handled during transfer thereof as well, is disclosed. In a semiconductor wafer of such structure that structures with a low mechanical strength, such as suspended microstructures, are exposed at a surface thereof, detachable adhesive sheet making up protective caps for the respective suspended microstructures are formed over the semiconductor wafer. By means of this, even if the semiconductor wafer is diced into the individual chips, respective microstructures on chips are protected from the external force, such as the pressure of cutting water, during the dicing process.
688 citations
Patent•
24 Apr 1990
TL;DR: In this article, a chip-bonded lead frame is molded with a coloeless or colored light transmissive resin to be protected against the external environment, which can be optionally selected as a plating process or the like is not performed onto the lead frame later.
Abstract: PURPOSE:To protect a device against the influence of chemicals or heat at a solder dipping process or a sheathing plating so as to improve the device in reliability by a method wherein a Sn or a solder plating film is formed on the outer lead section of a lead frame before a semiconductor chip and wires are molded with resin. CONSTITUTION:A silvering film 12 is formed on the tips of a first and a second lead 11s, and a Sn plating film or a solder plating film 13 is formed on the rest metal surface. A chip 14 is die-bonded to the precious metal plated tip of the lead 11, and a wire 15 is bonded between the chip 14 and the other lead 11. The chip bonded lead frame is molded with a coloeless or colored light transmissive resin 16 to be protected against the external environment. The resin adapted for a device can be optionally selected as a plating process or the like is not performed onto the lead frame later.
438 citations
TL;DR: In this paper, the nucleation and growth of isolated nickel disilicide precipitates in amorphous Si thin films and the subsequent low-temperature silicide-mediated crystallization of Si was studied using in situ transmission electron microscopy.
Abstract: The nucleation and growth of isolated nickel disilicide precipitates in Ni‐implanted amorphous Si thin films and the subsequent low‐temperature silicide‐mediated crystallization of Si was studied using in situ transmission electron microscopy. Analysis of the spatial distribution of the NiSi2 precipitates strongly suggested the occurrence of site saturation during nucleation. NiSi2 precipitates were observed in situ to migrate through the amorphous Si thin films leaving a trail of crystalline Si at temperatures as low as ∼484 °C. Initially, a thin region of epitaxial Si formed on {111} faces of the octahedral NiSi2 precipitates with a coherent interface which was shown by high‐resolution electron microscopy to be Type A. Migration of the NiSi2 precipitates led to the growth of needles of Si which were parallel to 〈111〉 directions. The growth rate of the crystalline Si was limited by diffusion through the NiSi2 precipitates, and an effective diffusivity was determined at 507 and 660 °C. A mechanism for the enhanced growth rate of crystalline Si is proposed.
422 citations