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Semiconductor device fundamentals

01 Jan 1996-
TL;DR: Semiconductor Models -- A General Introduction, Field Effect Introduction -- the J-FET and MESFET, and Electrostatics -- Mostly Qualitative Formulation.
Abstract: I. SEMICONDUCTOR FUNDAMENTALS. 1. Semiconductors -- A General Introduction. General Material Properties. Crystal Structure. Crystal Growth. 2. Carrier Modeling. The Quantization Concept. Semiconductor Models. Carrier Properties. State and Carrier Distributions. Equilibrium Carrier Concentrations. 3. Carrier Action. Drift. Diffusion. Recombination -- Generation. Equations of State. Supplemental Concepts. 4. Basics of Device Fabrication. Fabrication Processes. Device Fabrication Examples. R1. Part I Supplement and Review. Alternative/Supplemental Reading List. Figure Sources/Cited References. Review List of Terms. Part I Review Problem Sets and Answers. IIA. PN JUNCTION DIODES. 5. PN Junction Electrostatics. Preliminaries. Quantitative Electrostatic Relationships. 6. PN Junction Diode -- I-V Characteristics. The Ideal Diode Equation. Deviations from the Ideal. Special Considerations. 7. PN Junction Diode -- Small-Signal Admittance. Introduction. Reverse-Bias Junction Capacitance. Forward-Bias Diffusion Admittance. 8. PN Junction Diode -- Transient Response. Turn-Off Transient. Turn-On Transient. 9. Optoelectronic Diodes. Introduction. Photodiodes. Solar Cells. LEDs. IIB. BJTS AND OTHER JUNCTION DEVICES. 10. BJT Fundamentals. Terminology. Fabrication. Electrostatics. Introductory Operational Considerations. Performance Parameters. 11. BJT Static Characteristics. Ideal Transistor Analysis. Deviations from the Ideal. Modern BJT Structures. 12. BJT Dynamic Response Modeling. Equivalent Circuits. Transient (Switching) Response. 13. PNPN Devices. Silicon Controlled Rectifier (SCR). SCR Operational Theory. Practical Turn-on/Turn-off Considerations. Other PNPN Devices. 14. MS Contacts and Schottky Diodes. Ideal MS Contacts. Schottky Diode. Practical Contact Considerations. R2. Part II Supplement and Review. Alternative/Supplemental Reading List. Figure Sources/Cited References. Review List of Terms. Part II Review Problem Sets and Answers. III. FIELD EFFECT DEVICES. 15. Field Effect Introduction -- the J-FET and MESFET. General Introduction. J-FET. MESFET. 16. MOS Fundamentals. Ideal Structure Definition. Electrostatics -- Mostly Qualitative. Electrostatics -- Quantitative Formulation. Capacitance-Voltage Characteristics. 17. MOSFETs -- The Essentials. Qualitative Theory of Operation. Quantitative ID - VD Relationships. ac Response. 18. Nonideal MOS. Metal-Semiconductor Workfunction Difference. Oxide Charges. MOSFET Threshold Considerations. 19. Modern FET Structures. Small Dimension Effects. Select Structure Survey. R3. Part III Supplement and Review. Alternative/Supplemental Reading List. Figure Sources/Cited References. Review List of Terms. Part III Review Problem Sets and Answers. Appendix A. Elements of Quantum Mechanics. Appendix B. MOS Semiconductor Electrostatics -- Exact Solution. Appendix C. MOS C-V Supplement. Appendix D. MOS I-Vsupplement. Appendix E. List of Symbols. Appendix M. MATLAB Program Script.
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Journal ArticleDOI
14 Apr 2006-Science
TL;DR: This approach has the potential of converting mechanical, vibrational, and/or hydraulic energy into electricity for powering nanodevices.
Abstract: We have converted nanoscale mechanical energy into electrical energy by means of piezoelectric zinc oxide nanowire (NW) arrays. The aligned NWs are deflected with a conductive atomic force microscope tip in contact mode. The coupling of piezoelectric and semiconducting properties in zinc oxide creates a strain field and charge separation across the NW as a result of its bending. The rectifying characteristic of the Schottky barrier formed between the metal tip and the NW leads to electrical current generation. The efficiency of the NW-based piezoelectric power generator is estimated to be 17 to 30%. This approach has the potential of converting mechanical, vibrational, and/or hydraulic energy into electricity for powering nanodevices.

6,692 citations

Journal ArticleDOI
29 Apr 2003
TL;DR: Channel engineering techniques including retrograde well and halo doping are explained as means to manage short-channel effects for continuous scaling of CMOS devices and different circuit techniques to reduce the leakage power consumption are explored.
Abstract: High leakage current in deep-submicrometer regimes is becoming a significant contributor to power dissipation of CMOS circuits as threshold voltage, channel length, and gate oxide thickness are reduced. Consequently, the identification and modeling of different leakage components is very important for estimation and reduction of leakage power, especially for low-power applications. This paper reviews various transistor intrinsic leakage mechanisms, including weak inversion, drain-induced barrier lowering, gate-induced drain leakage, and gate oxide tunneling. Channel engineering techniques including retrograde well and halo doping are explained as means to manage short-channel effects for continuous scaling of CMOS devices. Finally, the paper explores different circuit techniques to reduce the leakage power consumption.

2,281 citations


Cites background from "Semiconductor device fundamentals"

  • ...A reverse-bias pn junction leakage has two main components: one is minority carrier diffusion/drift near the edge of the depletion region; the other is due to electron-hole pair generation in the depletion region of the reverse-biased junction [12]....

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Journal ArticleDOI
TL;DR: A comprehensive survey of conduction phenomena in all components of a Li-ion cell incorporating theoretical, experimental, and simulation studies is presented in this paper, where the critical results, issues and challenges with respect to ionic and electronic conduction in the cathode, anode and electrolyte are discussed.

1,394 citations


Cites methods from "Semiconductor device fundamentals"

  • ...The doping technique is often used by the semiconductor industry in order to precisely alter silicon conductivity by creating charge carriers in the form of excess electrons or holes [140]....

    [...]

Proceedings ArticleDOI
30 Aug 2010
TL;DR: This work presents Helios, a hybrid electrical/optical switch architecture that can deliver significant reductions in the number of switching elements, cabling, cost, and power consumption relative to recently proposed data center network architectures.
Abstract: The basic building block of ever larger data centers has shifted from a rack to a modular container with hundreds or even thousands of servers. Delivering scalable bandwidth among such containers is a challenge. A number of recent efforts promise full bisection bandwidth between all servers, though with significant cost, complexity, and power consumption. We present Helios, a hybrid electrical/optical switch architecture that can deliver significant reductions in the number of switching elements, cabling, cost, and power consumption relative to recently proposed data center network architectures. We explore architectural trade offs and challenges associated with realizing these benefits through the evaluation of a fully functional Helios prototype.

1,045 citations

Journal ArticleDOI
Woong Kim1, Ali Javey1, Ophir Vermesh1, Qian Wang1, Yiming Li1, Hongjie Dai1 
TL;DR: In this paper, it was shown that the transistors exhibit hysteresis in their electrical characteristics because of charge trapping by water molecules around the nanotubes, including SiO2 surface-bound water proximal to the nanotsubes.
Abstract: Carbon nanotube field-effect transistors commonly comprise nanotubes lying on SiO2 surfaces exposed to the ambient environment. It is shown here that the transistors exhibit hysteresis in their electrical characteristics because of charge trapping by water molecules around the nanotubes, including SiO2 surface-bound water proximal to the nanotubes. Hysteresis persists for the transistors in vacuum since the SiO2-bound water does not completely desorb in vacuum at room temperature, a known phenomenon in SiO2 surface chemistry. Heating under dry conditions significantly removes water and reduces hysteresis in the transistors. Nearly hysteresis-free transistors are obtainable by passivating the devices with polymers that hydrogen bond with silanol groups on SiO2 (e.g., with poly(methyl methacrylate) (PMMA)). However, nanotube humidity sensors could be explored with suitable water-sensitive coatings. The results may have implications to field-effect transistors made from other chemically derived materials.

962 citations