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Proceedings ArticleDOI

Series connected switched source based five level multilevel inverter

18 Mar 2016-pp 1-6
TL;DR: A discussion on multilevel inverter using series connected switched input DC sources using SPWM technique for generating pulses using a single phase five level inverter is presented.
Abstract: In this paper a discussion on multilevel inverter using series connected switched input DC sources is presented. Here, less number of switches and input DC sources with opposite polarity are used. A single phase five level inverter is considered for explaining the operating principle of the proposed methodology. Here, SPWM technique is employed for generating pulses. Analysis is carried out with various amplitudes and polarities of DC sources.
References
More filters
Journal ArticleDOI
TL;DR: A survey of different topologies, control strategies and modulation techniques used by cascaded multilevel inverters in the medium-voltage inverter market is presented.
Abstract: Cascaded multilevel inverters synthesize a medium-voltage output based on a series connection of power cells which use standard low-voltage component configurations. This characteristic allows one to achieve high-quality output voltages and input currents and also outstanding availability due to their intrinsic component redundancy. Due to these features, the cascaded multilevel inverter has been recognized as an important alternative in the medium-voltage inverter market. This paper presents a survey of different topologies, control strategies and modulation techniques used by these inverters. Regenerative and advanced topologies are also discussed. Applications where the mentioned features play a key role are shown. Finally, future developments are addressed.

2,111 citations


"Series connected switched source ba..." refers background in this paper

  • ...This gives maximum utilization of the switching frequency [7]....

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Journal ArticleDOI
12 Oct 1998
TL;DR: Two novel carrier-based multileVEL PWM schemes are presented which help to optimize or balance the switch utilization in multilevel inverters.
Abstract: The advent of the transformerless multilevel inverter topology has brought forth various pulsewidth modulation (PWM) schemes as a means to control the switching of the active devices in each of the multiple voltage levels in the inverter. An analysis of how existing multilevel carrier-based PWM affects switch utilization for the different levels of a diode-clamped inverter is conducted. Two novel carrier-based multilevel PWM schemes are presented which help to optimize or balance the switch utilization in multilevel inverters. A 10 kW prototype six-level diode-clamped inverter has been built and controlled with the novel PWM strategies proposed in this paper to act as a voltage-source inverter for a motor drive.

492 citations

Journal ArticleDOI
TL;DR: A complete analysis is given for a seven-level converter (three dc sources), where it is shown that for a range of the modulation index m/sub I/, the switching angles can be chosen to produce the desired fundamental V/sub 1/=m/ sub I/(s4V/sub dc///spl pi/) while making the fifth and seventh harmonics identically zero.
Abstract: In this work, a method is given to compute the switching angles in a multilevel converter to produce the required fundamental voltage while at the same time cancel out specified higher order harmonics. Specifically, a complete analysis is given for a seven-level converter (three dc sources), where it is shown that for a range of the modulation index m/sub I/, the switching angles can be chosen to produce the desired fundamental V/sub 1/=m/sub I/(s4V/sub dc///spl pi/) while making the fifth and seventh harmonics identically zero.

324 citations

Journal ArticleDOI
TL;DR: In this paper, the effect of clamping diodes in the diode-clamped multilevel inverters played an important role in determining its efficiency and the trade-off analysis was performed to quantify the suitability of multi-level inverters in low power applications.
Abstract: Multilevel inverters are an attractive solution in the medium-voltage and high-power applications. However in the low-power range also it can be a better solution compared to two-level inverters, if MOSFETs are used as devices switching in the order of 100 kHz. The effect of clamping diodes in the diode-clamped multilevel inverters play an important role in determining its efficiency. Power loss introduced by the reverse recovery of MOSFET body diode prohibits the use of MOSFET in hard-switched inverter legs. A technique of avoiding reverse recovery loss of MOSFET body diode in a three-level neutral point clamped inverter is suggested. The use of multilevel inverters topology enables operation at high switching frequency without sacrificing efficiency. High switching frequency of operation reduces the output filter requirement, which in turn helps in reducing the size of the inverter. This study elaborates the trade-off analysis to quantify the suitability of multilevel inverters in the low-power applications. Advantages of using a MOSFET-based three-level diode-clamped inverter for a PM motor drive and UPS systems are discussed.

150 citations

Journal ArticleDOI
TL;DR: In this article, a modified adaptive selective harmonic elimination (SHAE) algorithm is proposed to eliminate undesirable higher harmonic components from selected variable (current or voltage) and it requires only knowledge of the frequency of the component to be eliminated.
Abstract: The algorithms for adaptive canceling of selected harmonic components have been well developed in digital signal processing. In those applications, "filtering" is a primary objective. However, in power electronic applications control, with objectives like fast response of system on reference and disturbance change, is of primary importance. This paper provides a novel and a systematic design approach for applying signal processing methods (like modified adaptive selective harmonic elimination algorithms) as an addition to conventional control. Thus, both control objectives like fast transient response and efficient harmonic (disturbance) filtering are achieved. The filtering algorithm does not interfere and has minimal impact on the stability of the primary control loop. Its sole function is to eliminate undesirable higher harmonic components from selected variable (current or voltage) and it requires only knowledge of the frequency of the component to be eliminated. The methodology is applicable for a wide range of equipment like uninterrupted power systems, regenerative converters, active power filters, etc. The application of the proposed method in a regenerative voltage source converter for dead time compensation is used as an example for illustrating its effectiveness and design procedure

123 citations